[PATCH 00/13] mtd: spinand winbond: Add support for W25NxxLV and W25NxxLW chips

[PATCH 00/13] mtd: spinand winbond: Add support for W25NxxLV and W25NxxLW chips

[Miquel Raynal]

These chips mostly reuse the existing infrastructure and have been
tested using the mtd-utils test suite. In particular, I wrote and
contributed a new tool to ease continuous read testing:
https://lore.kernel.org/linux-mtd/20261030144108.2211604-1-miquel.raynal@bootlin.com/T/#u

A bit of reorganization and renaming is being done as well as
preparation.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
Miquel Raynal (13):
      mtd: spinand: winbond: Fix an OOB layout inconsistency with W25NxxLW chips
      mtd: spinand: winbond: Generalize the KV OOB layout
      mtd: spinand: winbond: Generalize the LW OOB layout
      mtd: spinand: winbond: Rename the ->set_cont_read() helper
      mtd: spinand: winbond: Rename the ->ecc_get_status() helper
      mtd: spinand: winbond: Add 1S_1S_1S continuous read variant
      mtd: spinand: winbond: Add basic support for W25N02LV
      mtd: spinand: winbond: Add basic support for W25N04LV
      mtd: spinand: winbond: Add basic support for W25N02LW
      mtd: spinand: winbond: Add continuous read support for W25N02LV
      mtd: spinand: winbond: Add continuous read support for W25N04LV
      mtd: spinand: winbond: Add continuous read support for W25N02LW
      mtd: spinand: winbond: Add continuous read support for W25N04LW

 drivers/mtd/nand/spi/winbond.c | 187 +++++++++++++++++++++++++++--------------
 1 file changed, 126 insertions(+), 61 deletions(-)
---
base-commit: b243a89e1b1e8ead7b44fc4eb0d0d4df0c9e3f4b
change-id: 20261030-winbond-master-w25nxxlvw-198bda3af7c2

Best regards,
-- 
Miquel Raynal <miquel.raynal@bootlin.com>


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[PATCH 01/13] mtd: spinand: winbond: Fix an OOB layout inconsistency with W25NxxLW chips

[Miquel Raynal]

W35NxxKV, KW, LV and LW have the same OOB layout pattern. Though, in the
KV and KW cases, they have been exposing the user data section that is
non protected. In the 08LW case, the choice has been to derive slightly
from this and to only expose the ECC protected user bytes.

Make sure 04LW which has been merged this cycle follows the 08LW
choice. All LV and LW chips should use the same layout.

Fixes: ea609469a3e3 ("mtd: spinand: winbond: add support for W25N04LW")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 810975808c97..49fa545a4113 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -836,7 +836,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25n08lw_ooblayout, w25n02kv_ecc_get_status)),
 	SPINAND_INFO("W35N04JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),

-- 
2.56.0


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[PATCH 02/13] mtd: spinand: winbond: Generalize the KV OOB layout

[Miquel Raynal]

All W25NxxKV and W25NxxKW chips use the same OOB layout. Rename the
helpers and structures to make it more obvious.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 54 ++++++++++++++++++------------------------
 1 file changed, 23 insertions(+), 31 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 49fa545a4113..4ef30f1a4aa8 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -318,16 +318,11 @@ static int w25n01kv_ooblayout_ecc(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
-				  struct mtd_oob_region *region)
+static int w25nxxkv_kw_ooblayout_ecc(struct mtd_info *mtd, int section,
+				     struct mtd_oob_region *region)
 {
-	int num_sections = 4;
-	int offset = 64;
-
-	if (mtd->oobsize == 256) {
-		num_sections = 8;
-		offset = 128;
-	}
+	unsigned int offset = mtd->oobsize / 2;
+	unsigned int num_sections = mtd->writesize / 512;
 
 	if (section >= num_sections)
 		return -ERANGE;
@@ -338,24 +333,21 @@ static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
-				   struct mtd_oob_region *region)
+/*
+ * The OOB layout is the same for all the W25NxxKV/KW/LV/LW chips: each
+ * 16-byte section holds 4 unprotected "User Data II" bytes followed by
+ * 12 ECC-protected "User Data I" bytes.
+ *
+ * This layout exposes both User Data I and II for backward compatibility.
+ */
+static int w25nxxkv_kw_ooblayout_free(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *region)
 {
-	int num_sections = 4;
-
-	if (mtd->oobsize == 256)
-		num_sections = 8;
+	unsigned int num_sections = mtd->writesize / 512;
 
 	if (section >= num_sections)
 		return -ERANGE;
 
-	/*
-	 * For at least W25N04KW and W25N04LW, this region is actually
-	 * split in two:
-	 * ECC-protected "User Data I" at + 4 offset, length 12
-	 * unprotected "User Data II" at + 2 offset, length 2
-	 * This returns the full region for backwards compatibility.
-	 */
 	region->offset = (16 * section) + 2;
 	region->length = 14;
 
@@ -364,12 +356,12 @@ static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
 
 static const struct mtd_ooblayout_ops w25n01kv_ooblayout = {
 	.ecc = w25n01kv_ooblayout_ecc,
-	.free = w25n02kv_ooblayout_free,
+	.free = w25nxxkv_kw_ooblayout_free,
 };
 
-static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
-	.ecc = w25n02kv_ooblayout_ecc,
-	.free = w25n02kv_ooblayout_free,
+static const struct mtd_ooblayout_ops w25nxxkv_kw_ooblayout = {
+	.ecc = w25nxxkv_kw_ooblayout_ecc,
+	.free = w25nxxkv_kw_ooblayout_free,
 };
 
 static int w25n08lw_ooblayout_ecc(struct mtd_info *mtd, int section,
@@ -786,7 +778,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
 	SPINAND_INFO("W25N02KW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
@@ -795,7 +787,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
 	SPINAND_INFO("W35N02JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
@@ -818,7 +810,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
 	SPINAND_INFO("W25N04KW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x23),
 		     NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1),
@@ -827,7 +819,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
 	SPINAND_INFO("W25N04LW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
@@ -836,7 +828,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n08lw_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
 	SPINAND_INFO("W35N04JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),

-- 
2.56.0


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Re: [PATCH 02/13] mtd: spinand: winbond: Generalize the KV OOB layout

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] mtd: spinand: winbond: accidental revert of W25N04LW OOB layout
--

commit c7bc36662c75a5deeedb5e5ecc44d6bc3947d7fd
Author: Miquel Raynal <miquel.raynal@bootlin.com>

mtd: spinand: winbond: Generalize the KV OOB layout

This commit generalizes and renames the W25N02KV OOB layout helpers and
structures to w25nxxkv_kw_ooblayout so it is clearer that all W25NxxKV and
W25NxxKW chips share the same OOB layout.

> diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
> index 49fa545a4113e..4ef30f1a4aa8e 100644
> --- a/drivers/mtd/nand/spi/winbond.c
> +++ b/drivers/mtd/nand/spi/winbond.c

[ ... ]

> @@ -827,7 +819,7 @@ static const struct spinand_info winbond_spinand_table[] = {
>  					      &write_cache_variants,
>  					      &update_cache_variants),
>  		     0,
> -		     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
> +		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
>  	SPINAND_INFO("W25N04LW", /* 1.8V */
>  		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
>  		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> @@ -836,7 +828,7 @@ static const struct spinand_info winbond_spinand_table[] = {
>  					      &write_cache_variants,
>  					      &update_cache_variants),
>  		     0,
> -		     SPINAND_ECCINFO(&w25n08lw_ooblayout, w25n02kv_ecc_get_status)),
> +		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),

[Severity: High]
Does changing the W25N04LW entry in winbond_spinand_table from
w25n08lw_ooblayout to w25nxxkv_kw_ooblayout accidentally revert the
preceding commit 4c37f4cb3704 ("mtd: spinand: winbond: Fix an OOB layout
inconsistency with W25NxxLW chips")?

That commit specifically switched W25N04LW to w25n08lw_ooblayout so that
w25n08lw_ooblayout_free() exposes only the 12 ECC-protected User Data I
bytes at offset (16 * section) + 4 and w25n08lw_ooblayout_ecc() returns
-ERANGE:

drivers/mtd/nand/spi/winbond.c:w25n08lw_ooblayout_free() {
	if (section > 7)
		return -ERANGE;

	region->offset = (16 * section) + 4;
	region->length = 12;

	return 0;
}

With w25nxxkv_kw_ooblayout assigned here instead, probing a W25N04LW chip
via spinand_init() registers w25nxxkv_kw_ooblayout_free() and
w25nxxkv_kw_ooblayout_ecc(), exposing 14 free OOB bytes starting at offset
(16 * section) + 2 (including unprotected User Data II bytes) and reporting
inaccessible ECC parity regions instead of keeping w25n08lw_ooblayout.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261030-winbond-master-w25nxxlvw-v1-0-91f67407dc8b@bootlin.com?part=2

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Re: [PATCH 02/13] mtd: spinand: winbond: Generalize the KV OOB layout

[Dominique Martinet]

Miquel Raynal wrote on Fri, Oct 30, 2026 at 06:45:26PM +0100:
> --- a/drivers/mtd/nand/spi/winbond.c
> +++ b/drivers/mtd/nand/spi/winbond.c
> @@ -318,16 +318,11 @@ static int w25n01kv_ooblayout_ecc(struct mtd_info *mtd, int section,
>  	return 0;
>  }
>  
> -static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
> -				  struct mtd_oob_region *region)
> +static int w25nxxkv_kw_ooblayout_ecc(struct mtd_info *mtd, int section,
> +				     struct mtd_oob_region *region)
>  {
> -	int num_sections = 4;
> -	int offset = 64;
> -
> -	if (mtd->oobsize == 256) {
> -		num_sections = 8;
> -		offset = 128;
> -	}
> +	unsigned int offset = mtd->oobsize / 2;
> +	unsigned int num_sections = mtd->writesize / 512;

Ah, I couldn't use oobsize for num_sections because of W25N01KV but
using writesize makes sense as well as there's one section per 512 bytes
chunk, and this works for all devices.

Good cleanup!

Reviewed-by: Dominique Martinet <dominique.martinet@atmark-techno.com>

-- 
Dominique



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[PATCH 03/13] mtd: spinand: winbond: Generalize the LW OOB layout

[Miquel Raynal]

All W25NxxLV and W25NxxLW chips use the same OOB layout. Rename the
helpers and structures to make it more obvious, and improve the comment
to reflect this situation.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 41 ++++++++++++++++++++++-------------------
 1 file changed, 22 insertions(+), 19 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 4ef30f1a4aa8..e3be93690bb7 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -339,6 +339,8 @@ static int w25nxxkv_kw_ooblayout_ecc(struct mtd_info *mtd, int section,
  * 12 ECC-protected "User Data I" bytes.
  *
  * This layout exposes both User Data I and II for backward compatibility.
+ * See w25nxxlv_lw_ooblayout_free() for a variant that only exposes the
+ * ECC-protected bytes.
  */
 static int w25nxxkv_kw_ooblayout_free(struct mtd_info *mtd, int section,
 				      struct mtd_oob_region *region)
@@ -364,37 +366,38 @@ static const struct mtd_ooblayout_ops w25nxxkv_kw_ooblayout = {
 	.free = w25nxxkv_kw_ooblayout_free,
 };
 
-static int w25n08lw_ooblayout_ecc(struct mtd_info *mtd, int section,
-				  struct mtd_oob_region *region)
+/*
+ * The second half of the OOB is not accessible when the on-die ECC
+ * engine is enabled. This prevents accessing the ECC bytes.
+ */
+static int w25nxxlv_lw_ooblayout_ecc(struct mtd_info *mtd, int section,
+				     struct mtd_oob_region *region)
 {
-	/*
-	 * With ecc enabled the parity bits are not accessible. So we can
-	 * only see page + 128. Without ecc the full page + 256 is accessible.
-	 * To make it simple just return the area as not accessible.
-	 */
 	return -ERANGE;
 }
 
-static int w25n08lw_ooblayout_free(struct mtd_info *mtd, int section,
-				   struct mtd_oob_region *region)
+/*
+ * Same layout as w25nxxkv_kw_ooblayout_free(), except that only the
+ * ECC-protected "User Data I" bytes are exposed. The non ECC-protected
+ * "User Data II" bytes are not exposed.
+ */
+static int w25nxxlv_lw_ooblayout_free(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *region)
 {
-	if (section > 7)
+	unsigned int num_sections = mtd->writesize / 512;
+
+	if (section >= num_sections)
 		return -ERANGE;
 
-	/*
-	 * Only expose the ECC protected "User Data I" bytes. The "User Data II"
-	 * bytes at offset + 2 are not covered by the on-die ECC engine, and the
-	 * first two bytes of the section hold the BBM.
-	 */
 	region->offset = (16 * section) + 4;
 	region->length = 12;
 
 	return 0;
 }
 
-static const struct mtd_ooblayout_ops w25n08lw_ooblayout = {
-	.ecc = w25n08lw_ooblayout_ecc,
-	.free = w25n08lw_ooblayout_free,
+static const struct mtd_ooblayout_ops w25nxxlv_lw_ooblayout = {
+	.ecc = w25nxxlv_lw_ooblayout_ecc,
+	.free = w25nxxlv_lw_ooblayout_free,
 };
 
 static int w25n01jw_ooblayout_ecc(struct mtd_info *mtd, int section,
@@ -852,7 +855,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 							&update_cache_variants,
 							&cont_read_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n08lw_ooblayout, w25n02kv_ecc_get_status),
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25n02kv_ecc_get_status),
 		     SPINAND_CONT_READ(w25n0xjw_set_cont_read)),
 };
 

-- 
2.56.0


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Re: [PATCH 03/13] mtd: spinand: winbond: Generalize the LW OOB layout

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] mtd: spinand: winbond: W25N04LW left using w25nxxkv_kw_ooblayout
--

commit 64760906da7fbc1faf3036caf91cb645ff00e508
Author: Miquel Raynal <miquel.raynal@bootlin.com>

mtd: spinand: winbond: Generalize the LW OOB layout

This commit renames the W25N08LW OOB layout helpers and ops structure to
w25nxxlv_lw_ooblayout* so they can be shared across W25NxxLV and W25NxxLW
chips, and updates w25nxxlv_lw_ooblayout_free() to compute the section limit
from mtd->writesize.

> diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
> index 4ef30f1a4aa8e..e3be93690bb71 100644
> --- a/drivers/mtd/nand/spi/winbond.c
> +++ b/drivers/mtd/nand/spi/winbond.c

[ ... ]

> @@ -852,7 +855,7 @@ static const struct spinand_info winbond_spinand_table[] = {
>  							&update_cache_variants,
>  							&cont_read_cache_variants),
>  		     0,
> -		     SPINAND_ECCINFO(&w25n08lw_ooblayout, w25n02kv_ecc_get_status),
> +		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25n02kv_ecc_get_status),
>  		     SPINAND_CONT_READ(w25n0xjw_set_cont_read)),
>  };

[Severity: Medium]
Should the W25N04LW entry in winbond_spinand_table also be updated to use
w25nxxlv_lw_ooblayout here?

Earlier in this series, commit 4c37f4cb3704 ("mtd: spinand: winbond: Fix an
OOB layout inconsistency with W25NxxLW chips") switched W25N04LW from
w25n02kv_ooblayout to w25n08lw_ooblayout, but the following commit
c7bc36662c75 ("mtd: spinand: winbond: Generalize the KV OOB layout")
replaced it with w25nxxkv_kw_ooblayout:

drivers/mtd/nand/spi/winbond.c:winbond_spinand_table[] {
	...
	SPINAND_INFO("W25N04LW", /* 1.8V */
		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
		     NAND_ECCREQ(8, 512),
		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants),
		     0,
		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
	...
}

When a W25N04LW chip is probed, leaving it on w25nxxkv_kw_ooblayout exposes
the 2 non-ECC-protected User Data II bytes per section via
w25nxxkv_kw_ooblayout_free() and reports ECC regions in the upper half of
OOB via w25nxxkv_kw_ooblayout_ecc(), even though the second half of OOB is
not accessible when the on-die ECC engine is enabled.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261030-winbond-master-w25nxxlvw-v1-0-91f67407dc8b@bootlin.com?part=3

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[PATCH 04/13] mtd: spinand: winbond: Rename the ->set_cont_read() helper

[Miquel Raynal]

All W25N chips (KV, JV, LV, KW, JW, LW) seem to share the same helper.
W35N chips have one more item to configure in their callback, but
otherwise are also very close.

Rename the helper to clarify its use.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index e3be93690bb7..c6f7f0a42722 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -582,7 +582,7 @@ static int w25n0xjw_hs_cfg(struct spinand_device *spinand,
 	return w25n0xjw_set_sr4_hs(spinand, w25n0xjw_op_needs_hs(op));
 }
 
-static int w25n0xjw_set_cont_read(struct spinand_device *spinand, bool enable)
+static int w25n_set_cont_read(struct spinand_device *spinand, bool enable)
 {
 	u8 mask = enable ? 0 : WINBOND_CFG_BUF_READ;
 
@@ -726,7 +726,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&w25n01jw_ooblayout, w25w35nxxjw_ecc_get_status),
 		     SPINAND_CONFIGURE_CHIP(w25n0xjw_hs_cfg),
-		     SPINAND_CONT_READ(w25n0xjw_set_cont_read)),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 	SPINAND_INFO("W25N01KV", /* 3.3V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
 		     NAND_MEMORG(1, 2048, 96, 64, 1024, 20, 1, 1, 1),
@@ -772,7 +772,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, w25w35nxxjw_ecc_get_status),
 		     SPINAND_CONFIGURE_CHIP(w25n0xjw_hs_cfg),
-		     SPINAND_CONT_READ(w25n0xjw_set_cont_read)),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 	SPINAND_INFO("W25N02KV", /* 3.3V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
@@ -856,7 +856,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 							&cont_read_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25n02kv_ecc_get_status),
-		     SPINAND_CONT_READ(w25n0xjw_set_cont_read)),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 };
 
 static int winbond_spinand_init(struct spinand_device *spinand)

-- 
2.56.0


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[PATCH 05/13] mtd: spinand: winbond: Rename the ->ecc_get_status() helper

[Miquel Raynal]

Most W25N chips (KV, LV, KW, LW) seem to share the same helper.

Rename the helper to clarify its use.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index c6f7f0a42722..8bf2d4e08bec 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -470,8 +470,8 @@ static const struct mtd_ooblayout_ops w35n01jw_ooblayout = {
 	.free = w35n01jw_ooblayout_free,
 };
 
-static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
-				   u8 status)
+static int w25nxxkv_kw_lv_lw_ecc_get_status(struct spinand_device *spinand,
+					    u8 status)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
 	u8 mbf = 0;
@@ -735,7 +735,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25n01kv_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25n01kv_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W35N01JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdc, 0x21),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 1, 1),
@@ -781,7 +781,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W25N02KW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
@@ -790,7 +790,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W35N02JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
@@ -813,7 +813,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W25N04KW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x23),
 		     NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1),
@@ -822,7 +822,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W25N04LW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
@@ -831,7 +831,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25n02kv_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W35N04JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
@@ -855,7 +855,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 							&update_cache_variants,
 							&cont_read_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25n02kv_ecc_get_status),
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status),
 		     SPINAND_CONT_READ(w25n_set_cont_read)),
 };
 

-- 
2.56.0


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[PATCH 06/13] mtd: spinand: winbond: Add 1S_1S_1S continuous read variant

[Miquel Raynal]

The speed jump is not amazing, yet the feature exists and brings a few %
of extra speed.

$ flash_speed /dev/mtd0 -C
...
page read speed is 966 KiB/s
testing multiple pages read speed
2 page read speed is 977 KiB/s
3 page read speed is 984 KiB/s
4 page read speed is 984 KiB/s
5 page read speed is 987 KiB/s
6 page read speed is 991 KiB/s
7 page read speed is 992 KiB/s
8 page read speed is 988 KiB/s
9 page read speed is 992 KiB/s
10 page read speed is 991 KiB/s
11 page read speed is 995 KiB/s
12 page read speed is 991 KiB/s
13 page read speed is 995 KiB/s
14 page read speed is 995 KiB/s
15 page read speed is 995 KiB/s
16 page read speed is 996 KiB/s
32 page read speed is 992 KiB/s
64 page read speed is 996 KiB/s
...

Data integrity can be checked with the new mtd-utils tool:

$ nandcontreadtest /dev/mtd0
testing 2 blocks from 0 to 1 (2 good), seed 37
success: verified 524288 bytes read in 517.787 ms (988.82 KiB/s)

Link: https://lore.kernel.org/linux-mtd/20261030144108.2211604-1-miquel.raynal@bootlin.com
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 8bf2d4e08bec..72f041b87bda 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -39,6 +39,13 @@
  * always at least provide the column. Keep using address cycles, but
  * reduce the number of dummy cycles accordingly.
  */
+#define WINBOND_CONT_READ_FROM_CACHE_1S_1S_1S_OP(ndummy, buf, len, freq) \
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x03, 1),				\
+		   SPI_MEM_OP_ADDR(1, 0, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy - 1, 1),			\
+		   SPI_MEM_OP_DATA_IN(len, buf, 1),			\
+		   SPI_MEM_OP_MAX_FREQ(freq))
+
 #define WINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(ndummy, buf, len, freq) \
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0x0b, 1),				\
 		   SPI_MEM_OP_ADDR(1, 0, 1),				\
@@ -216,7 +223,8 @@ static SPINAND_OP_VARIANTS(cont_read_cache_variants,
 		WINBOND_CONT_READ_FROM_CACHE_1S_1S_4S_OP(4, NULL, 0, 0),
 		WINBOND_CONT_READ_FROM_CACHE_1S_2S_2S_OP(4, NULL, 0, 0),
 		WINBOND_CONT_READ_FROM_CACHE_1S_1S_2S_OP(4, NULL, 0, 0),
-		WINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(4, NULL, 0, 0));
+		WINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(4, NULL, 0, 0),
+		WINBOND_CONT_READ_FROM_CACHE_1S_1S_1S_OP(3, NULL, 0, 0));
 
 static SPINAND_OP_VARIANTS(write_cache_variants,
 		SPINAND_PROG_LOAD_1S_1S_4S_OP(true, 0, NULL, 0),

-- 
2.56.0


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[PATCH 07/13] mtd: spinand: winbond: Add basic support for W25N02LV

[Miquel Raynal]

$ nandbiterrs -i /dev/mtd0
incremental biterrors test
Successfully corrected 0 bit errors per subpage
Inserted biterror @ 0/5
Read reported 1 corrected bit errors
Successfully corrected 1 bit errors per subpage
Inserted biterror @ 0/2
Read reported 2 corrected bit errors
Successfully corrected 2 bit errors per subpage
Inserted biterror @ 0/0
Read reported 3 corrected bit errors
Successfully corrected 3 bit errors per subpage
Inserted biterror @ 1/7
Read reported 4 corrected bit errors
Successfully corrected 4 bit errors per subpage
Inserted biterror @ 1/5
Read reported 5 corrected bit errors
Successfully corrected 5 bit errors per subpage
Inserted biterror @ 1/2
Read reported 6 corrected bit errors
Successfully corrected 6 bit errors per subpage
Inserted biterror @ 1/0
Read reported 7 corrected bit errors
Successfully corrected 7 bit errors per subpage
Inserted biterror @ 2/6
Read reported 8 corrected bit errors
Successfully corrected 8 bit errors per subpage
Inserted biterror @ 2/5
Failed to recover 1 bitflips
Read error after 9 bit errors per page

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 72f041b87bda..e14f026fc99d 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -210,6 +210,22 @@ static SPINAND_OP_VARIANTS(cont_read_cache_dual_quad_dtr_variants,
 		/* The 1S_1D_1D variant would require 4.5 dummy bytes, this is not possible */
 		WINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(4, NULL, 0, 0));
 
+/*
+ * Unlike the other devices, W25NxxLV/LW capable chips have an absolute maximum
+ * frequency of 133MHz.
+ */
+
+static SPINAND_OP_VARIANTS(w25nxxlv_read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_1S_4D_4D_OP(0, 8, NULL, 0, 66 * HZ_PER_MHZ),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1D_4D_OP(0, 2, NULL, 0, 66 * HZ_PER_MHZ),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_4S_4S_OP(0, 2, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_2S_2S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_2S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1D_1D_OP(0, 2, NULL, 0, 66 * HZ_PER_MHZ),
+		SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
+
 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_1S_4S_4S_OP(0, 2, NULL, 0, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
@@ -799,6 +815,15 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+	SPINAND_INFO("W25N02LV", /* 3.3V */
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x8a, 0x22),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&w25nxxlv_read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W35N02JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),

-- 
2.56.0


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[PATCH 08/13] mtd: spinand: winbond: Add basic support for W25N04LV

[Miquel Raynal]

$ nandbiterrs -i /dev/mtd0
incremental biterrors test
Successfully corrected 0 bit errors per subpage
Inserted biterror @ 0/5
Read reported 1 corrected bit errors
Successfully corrected 1 bit errors per subpage
Inserted biterror @ 0/2
Read reported 2 corrected bit errors
Successfully corrected 2 bit errors per subpage
Inserted biterror @ 0/0
Read reported 3 corrected bit errors
Successfully corrected 3 bit errors per subpage
Inserted biterror @ 1/7
Read reported 4 corrected bit errors
Successfully corrected 4 bit errors per subpage
Inserted biterror @ 1/5
Read reported 5 corrected bit errors
Successfully corrected 5 bit errors per subpage
Inserted biterror @ 1/2
Read reported 6 corrected bit errors
Successfully corrected 6 bit errors per subpage
Inserted biterror @ 1/0
Read reported 7 corrected bit errors
Successfully corrected 7 bit errors per subpage
Inserted biterror @ 2/6
Read reported 8 corrected bit errors
Successfully corrected 8 bit errors per subpage
Inserted biterror @ 2/5
Failed to recover 1 bitflips
Read error after 9 bit errors per page

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index e14f026fc99d..410dd27473f8 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -856,6 +856,15 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+	SPINAND_INFO("W25N04LV", /* 3.3V */
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x8b, 0x23),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&w25nxxlv_read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W25N04LW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),

-- 
2.56.0


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[PATCH 09/13] mtd: spinand: winbond: Add basic support for W25N02LW

[Miquel Raynal]

$ nandbiterrs -i /dev/mtd0
incremental biterrors test
Successfully corrected 0 bit errors per subpage
Inserted biterror @ 0/5
Read reported 1 corrected bit errors
Successfully corrected 1 bit errors per subpage
Inserted biterror @ 0/2
Read reported 2 corrected bit errors
Successfully corrected 2 bit errors per subpage
Inserted biterror @ 0/0
Read reported 3 corrected bit errors
Successfully corrected 3 bit errors per subpage
Inserted biterror @ 1/7
Read reported 4 corrected bit errors
Successfully corrected 4 bit errors per subpage
Inserted biterror @ 1/5
Read reported 5 corrected bit errors
Successfully corrected 5 bit errors per subpage
Inserted biterror @ 1/2
Read reported 6 corrected bit errors
Successfully corrected 6 bit errors per subpage
Inserted biterror @ 1/0
Read reported 7 corrected bit errors
Successfully corrected 7 bit errors per subpage
Inserted biterror @ 2/6
Read reported 8 corrected bit errors
Successfully corrected 8 bit errors per subpage
Inserted biterror @ 2/5
Failed to recover 1 bitflips
Read error after 9 bit errors per page

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 410dd27473f8..6d7732761785 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -824,6 +824,15 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+	SPINAND_INFO("W25N02LW", /* 1.8V */
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12, 0x22),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
 	SPINAND_INFO("W35N02JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),

-- 
2.56.0


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[PATCH 10/13] mtd: spinand: winbond: Add continuous read support for W25N02LV

[Miquel Raynal]

LV chips have DDR support, otherwise they support the same variants as
the other chips.

$ nandcontreadtest /dev/mtd0
testing 10 blocks from 0 to 9 (10 good), seed 27
success: verified 1310720 bytes read in 756.306 ms (1692.44 KiB/s)

$ flash_speed /dev/mtd0 -C
1 page read speed is 1580 KiB/s
2 page read speed is 1580 KiB/s
3 page read speed is 1615 KiB/s
4 page read speed is 1641 KiB/s
5 page read speed is 1643 KiB/s
6 page read speed is 1643 KiB/s
7 page read speed is 1657 KiB/s
8 page read speed is 1662 KiB/s
9 page read speed is 1680 KiB/s
10 page read speed is 1666 KiB/s
11 page read speed is 1692 KiB/s
12 page read speed is 1690 KiB/s
13 page read speed is 1677 KiB/s
14 page read speed is 1696 KiB/s
15 page read speed is 1690 KiB/s
16 page read speed is 1684 KiB/s
32 page read speed is 1684 KiB/s
64 page read speed is 1706 KiB/s

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 6d7732761785..933a85bb79b0 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -226,6 +226,17 @@ static SPINAND_OP_VARIANTS(w25nxxlv_read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
 
+static SPINAND_OP_VARIANTS(w25nxxlv_cont_read_cache_variants,
+		WINBOND_CONT_READ_FROM_CACHE_1S_4D_4D_OP(11, NULL, 0, 66 * HZ_PER_MHZ),
+		WINBOND_CONT_READ_FROM_CACHE_1S_1D_4D_OP(5, NULL, 0, 66 * HZ_PER_MHZ),
+		WINBOND_CONT_READ_FROM_CACHE_1S_4S_4S_OP(6, NULL, 0, 0),
+		WINBOND_CONT_READ_FROM_CACHE_1S_1S_4S_OP(4, NULL, 0, 0),
+		WINBOND_CONT_READ_FROM_CACHE_1S_2S_2S_OP(4, NULL, 0, 0),
+		WINBOND_CONT_READ_FROM_CACHE_1S_1S_2S_OP(4, NULL, 0, 0),
+		/* The 1S_1D_1D variant would require 4.5 dummy bytes, this is not possible */
+		WINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(4, NULL, 0, 0),
+		WINBOND_CONT_READ_FROM_CACHE_1S_1S_1S_OP(3, NULL, 0, 0));
+
 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_1S_4S_4S_OP(0, 2, NULL, 0, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
@@ -819,11 +830,13 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x8a, 0x22),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
-		     SPINAND_INFO_OP_VARIANTS(&w25nxxlv_read_cache_variants,
-					      &write_cache_variants,
-					      &update_cache_variants),
+		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&w25nxxlv_read_cache_variants,
+							&write_cache_variants,
+							&update_cache_variants,
+							&w25nxxlv_cont_read_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 	SPINAND_INFO("W25N02LW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12, 0x22),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),

-- 
2.56.0


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[PATCH 11/13] mtd: spinand: winbond: Add continuous read support for W25N04LV

[Miquel Raynal]

LV chips have DDR support, otherwise they support the same variants as
the other chips.

$ nandcontreadtest /dev/mtd0
testing 2 blocks from 0 to 1 (2 good), seed 29
success: verified 524288 bytes read in 291.735 ms (1755.02 KiB/s)

$ flash_speed /dev/mtd0 -C
1 page read speed is 1673 KiB/s
2 page read speed is 1718 KiB/s
3 page read speed is 1737 KiB/s
4 page read speed is 1741 KiB/s
5 page read speed is 1764 KiB/s
6 page read speed is 1764 KiB/s
7 page read speed is 1762 KiB/s
8 page read speed is 1753 KiB/s
9 page read speed is 1774 KiB/s
10 page read speed is 1764 KiB/s
11 page read speed is 1774 KiB/s
12 page read speed is 1777 KiB/s
13 page read speed is 1777 KiB/s
14 page read speed is 1763 KiB/s
15 page read speed is 1777 KiB/s
16 page read speed is 1790 KiB/s
32 page read speed is 1777 KiB/s
64 page read speed is 1777 KiB/s

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 933a85bb79b0..6dd3341c6dd7 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -882,11 +882,13 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x8b, 0x23),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
-		     SPINAND_INFO_OP_VARIANTS(&w25nxxlv_read_cache_variants,
-					      &write_cache_variants,
-					      &update_cache_variants),
+		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&w25nxxlv_read_cache_variants,
+							&write_cache_variants,
+							&update_cache_variants,
+							&w25nxxlv_cont_read_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 	SPINAND_INFO("W25N04LW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),

-- 
2.56.0


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[PATCH 12/13] mtd: spinand: winbond: Add continuous read support for W25N02LW

[Miquel Raynal]

LW chips follow the existing patterns, we can reuse the existing
set_cont_read() helper as well as the existing continuous read variants.

$ nandcontreadtest /dev/mtd0
testing 2 blocks from 0 to 1 (2 good), seed 22
success: verified 262144 bytes read in 202.780 ms (1262.45 KiB/s)

$ flash_speed /dev/mtd0 -C
1 page read speed is 1185 KiB/s
2 page read speed is 1207 KiB/s
3 page read speed is 1223 KiB/s
4 page read speed is 1242 KiB/s
5 page read speed is 1250 KiB/s
6 page read speed is 1263 KiB/s
7 page read speed is 1260 KiB/s
8 page read speed is 1267 KiB/s
9 page read speed is 1260 KiB/s
10 page read speed is 1263 KiB/s
11 page read speed is 1264 KiB/s
12 page read speed is 1263 KiB/s
13 page read speed is 1253 KiB/s
14 page read speed is 1272 KiB/s
15 page read speed is 1276 KiB/s
16 page read speed is 1267 KiB/s
32 page read speed is 1280 KiB/s
64 page read speed is 1280 KiB/s

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 6dd3341c6dd7..17147444f8cb 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -841,11 +841,13 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12, 0x22),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
-		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-					      &write_cache_variants,
-					      &update_cache_variants),
+		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_variants,
+							&write_cache_variants,
+							&update_cache_variants,
+							&cont_read_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxlv_lw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 	SPINAND_INFO("W35N02JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),

-- 
2.56.0


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[PATCH 13/13] mtd: spinand: winbond: Add continuous read support for W25N04LW

[Miquel Raynal]

LW chips follow the existing patterns, we can reuse the existing
set_cont_read() helper as well as the existing continuous read variants.

$ nandcontreadtest /dev/mtd0
testing 2 blocks from 0 to 1 (2 good), seed 22
success: verified 524288 bytes read in 405.770 ms (1261.80 KiB/s)

$ flash_speed /dev/mtd0 -C
1 page read speed is 1230 KiB/s
2 page read speed is 1242 KiB/s
3 page read speed is 1247 KiB/s
4 page read speed is 1261 KiB/s
5 page read speed is 1263 KiB/s
6 page read speed is 1263 KiB/s
7 page read speed is 1266 KiB/s
8 page read speed is 1261 KiB/s
9 page read speed is 1272 KiB/s
10 page read speed is 1269 KiB/s
11 page read speed is 1271 KiB/s
12 page read speed is 1269 KiB/s
13 page read speed is 1268 KiB/s
14 page read speed is 1272 KiB/s
15 page read speed is 1276 KiB/s
16 page read speed is 1273 KiB/s
32 page read speed is 1273 KiB/s
64 page read speed is 1261 KiB/s

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/spi/winbond.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 17147444f8cb..c897d1686d25 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -895,11 +895,13 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
-		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-					      &write_cache_variants,
-					      &update_cache_variants),
+		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_variants,
+							&write_cache_variants,
+							&update_cache_variants,
+							&cont_read_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
+		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status),
+		     SPINAND_CONT_READ(w25n_set_cont_read)),
 	SPINAND_INFO("W35N04JW", /* 1.8V */
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
 		     NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),

-- 
2.56.0


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Re: [PATCH 13/13] mtd: spinand: winbond: Add continuous read support for W25N04LW

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] mtd: spinand: winbond: W25N04LW uses wrong OOB layout w25nxxkv_kw_ooblayout
--

commit 806af285b955963cbeff1fd619e9d9a72b5987e3
Author: Miquel Raynal <miquel.raynal@bootlin.com>

mtd: spinand: winbond: Add continuous read support for W25N04LW

This commit enables continuous read support for the Winbond W25N04LW SPI-NAND
flash chip by configuring cont_read_cache_variants and the w25n_set_cont_read
helper in winbond_spinand_table.

> diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
> index 17147444f8cbc..c897d1686d259 100644
> --- a/drivers/mtd/nand/spi/winbond.c
> +++ b/drivers/mtd/nand/spi/winbond.c
> @@ -895,11 +895,13 @@ static const struct spinand_info winbond_spinand_table[] = {
>  		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb2, 0x23),
>  		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
>  		     NAND_ECCREQ(8, 512),
> -		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> -					      &write_cache_variants,
> -					      &update_cache_variants),
> +		     SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_variants,
> +							&write_cache_variants,
> +							&update_cache_variants,
> +							&cont_read_cache_variants),
>  		     0,
> -		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status)),
> +		     SPINAND_ECCINFO(&w25nxxkv_kw_ooblayout, w25nxxkv_kw_lv_lw_ecc_get_status),
> +		     SPINAND_CONT_READ(w25n_set_cont_read)),

[Severity: Medium]
Should the W25N04LW entry in winbond_spinand_table use &w25nxxlv_lw_ooblayout
instead of &w25nxxkv_kw_ooblayout here?

Earlier in this series, commit 4c37f4cb3704 ("mtd: spinand: winbond: Fix an
OOB layout inconsistency with W25NxxLW chips") changed W25N04LW from
&w25n02kv_ooblayout to &w25n08lw_ooblayout so that all W25NxxLV and W25NxxLW
chips share the same OOB layout.

However, commit c7bc36662c75 ("mtd: spinand: winbond: Generalize the KV OOB
layout") appears to have accidentally overwritten &w25n08lw_ooblayout on
W25N04LW with &w25nxxkv_kw_ooblayout, which then caused commit 64760906da7f
("mtd: spinand: winbond: Generalize the LW OOB layout") to miss W25N04LW when
renaming w25n08lw_ooblayout to w25nxxlv_lw_ooblayout.

With &w25nxxkv_kw_ooblayout registered for W25N04LW during spinand_init(),
w25nxxkv_kw_ooblayout_free() exposes 14 free bytes per 16-byte OOB section
starting at offset 2 (including the 2 User Data II bytes not protected by
on-die ECC) instead of only the 12 ECC-protected User Data I bytes at offset 4
returned by w25nxxlv_lw_ooblayout_free(), and w25nxxkv_kw_ooblayout_ecc()
reports ECC parity regions in the upper half of OOB rather than returning
-ERANGE as w25nxxlv_lw_ooblayout_ecc() does for W25N02LV, W25N02LW, W25N04LV,
and W25N08LW.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261030-winbond-master-w25nxxlvw-v1-0-91f67407dc8b@bootlin.com?part=13

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