MIssed interrupts

MIssed interrupts

[Rick Brown]

Hi,

If a particual IRQ line has been disabled (disable_irq()), what
happens if the device on that IRQ line generates interrupt? Does it
result in missed interrupt?

And in case of Uniprocessor machine, what happens if interrupts are
generated while spinlock_irq_save() etc?

TIA,

Rick
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Re: MIssed interrupts

[Mulyadi Santosa]

Hi....

On Feb 7, 2008 12:12 PM, Rick Brown <rick.brown.3@gmail.com> wrote:
> Hi,
>
> If a particual IRQ line has been disabled (disable_irq()), what
> happens if the device on that IRQ line generates interrupt? Does it
> result in missed interrupt?

AFAIK at the time it's in disabled state...yes it will be missed. But
once you enabled it again.... missing interrupts will be received. It
is different when interrupt is masked...it will be simply ignored.

regards.

Mulyadi.
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Re: MIssed interrupts

[Jike Song]

On Thu, Feb 7, 2008 at 11:50 PM, Mulyadi Santosa
<mulyadi.santosa@gmail.com> wrote:
> Hi....
>
>  AFAIK at the time it's in disabled state...yes it will be missed. But
>  once you enabled it again.... missing interrupts will be received.

Do you mean that the PIC(Local APIC or something else) will retain the
disabled interrupt, and deliver it once again to the processor core as
soon as be re-enabled?

Regards,
Jike
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Re: MIssed interrupts

[Mulyadi Santosa]

Hi...

On Fri, Feb 29, 2008 at 2:21 PM, Jike Song <albcamus@gmail.com> wrote:
>  Do you mean that the PIC(Local APIC or something else) will retain the
>  disabled interrupt, and deliver it once again to the processor core as
>  soon as be re-enabled?

As far as I know, yes

regards,

Mulyadi.
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Re: MIssed interrupts

[Jike Song]

On Fri, Feb 29, 2008 at 7:43 PM, Mulyadi Santosa
<mulyadi.santosa@gmail.com> wrote:
>  As far as I know, yes
>
>  regards,
>
>  Mulyadi.
>

Thanks for the confirmation.

Regards,
Jike
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Re: MIssed interrupts

[Peter Teoh]

More information on missing interrupts, esp on ARM platform:

http://www.embeddedrelated.com/usenet/embedded/show/72620-1.php

On Mon, Mar 3, 2008 at 9:10 AM, Jike Song <albcamus@gmail.com> wrote:
> On Fri, Feb 29, 2008 at 7:43 PM, Mulyadi Santosa
>
> <mulyadi.santosa@gmail.com> wrote:
>
> >  As far as I know, yes
>  >
>  >  regards,
>  >
>  >  Mulyadi.
>  >
>
>  Thanks for the confirmation.
>
>  Regards,
>  Jike
>
>
> --
>  To unsubscribe from this list: send the line "unsubscribe linux-newbie" in
>  the body of a message to majordomo@vger.kernel.org
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>



-- 
Regards,
Peter Teoh
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Re: MIssed interrupts

[Peter Teoh]

Hi Mulyadi,

On Fri, Feb 29, 2008 at 3:21 PM, Jike Song <albcamus@gmail.com> wrote:
> On Thu, Feb 7, 2008 at 11:50 PM, Mulyadi Santosa
>  <mulyadi.santosa@gmail.com> wrote:
>  > Hi....
>  >
>  >  AFAIK at the time it's in disabled state...yes it will be missed. But
>  >  once you enabled it again.... missing interrupts will be received.
>
>  Do you mean that the PIC(Local APIC or something else) will retain the
>  disabled interrupt, and deliver it once again to the processor core as
>  soon as be re-enabled?
>

This is something new to me.   After some some search, Mulyadi is
right.  It is called "Interrupt Request Buffering".   And according to
Unabridged Pentium 4 (pg 1537) while processing one interrupt, it can
receive another interrupt, but the 3rd one that comes in will be
discarded, and it is all on the same interrupt vector.   Thanks for
the sharing everyone....

>  Regards,
>  Jike
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Re: MIssed interrupts

[Mulyadi Santosa]

Hi...

On Fri, Feb 29, 2008 at 9:34 PM, Peter Teoh <htmldeveloper@gmail.com> wrote:
>  This is something new to me.   After some some search, Mulyadi is
>  right.  It is called "Interrupt Request Buffering".   And according to
>  Unabridged Pentium 4 (pg 1537) while processing one interrupt, it can
>  receive another interrupt, but the 3rd one that comes in will be
>  discarded, and it is all on the same interrupt vector.   Thanks for
>  the sharing everyone....

Well, I just recall the best I could from Understanding the Linux
kernel 3rd edition. If somebody can give further confirmation, that
would be great.

regards,

Mulyadi.
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Re: MIssed interrupts

[Peter Teoh]

On 2/7/08, Rick Brown <rick.brown.3@gmail.com> wrote:
> Hi,
>
>  If a particual IRQ line has been disabled (disable_irq()), what
>  happens if the device on that IRQ line generates interrupt? Does it
>  result in missed interrupt?

Yes, and there are a few other problems with interrupts too.   For
missed interrupt, we solved by "bottom half".    In essence the
interrupt handler has to be very short (which is immuned to another
interrupt trigger), and complete as soon as possible to get ready to
receive another interrupt, while the "deferred context" can execute
slowly, but is all the time interrupt-ready.

>
>  And in case of Uniprocessor machine, what happens if interrupts are
>  generated while spinlock_irq_save() etc?
>

Same, missed interrupts.

Check this out:

http://www.cs.utah.edu/classes/cs5785/slides/08-6up.pdf
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