From: Chaitanya Kulkarni <chaitanyak@nvidia.com>
To: Niklas Cassel <cassel@kernel.org>, Damien Le Moal <dlemoal@kernel.org>
Cc: "linux-nvme@lists.infradead.org" <linux-nvme@lists.infradead.org>,
"Christoph Hellwig" <hch@lst.de>,
"Keith Busch" <kbusch@kernel.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Sagi Grimberg" <sagi@grimberg.me>,
"Chaitanya Kulkarni" <chaitanyak@nvidia.com>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>
Subject: Re: [PATCH v2] nvmet: pci-epf: Always configure BAR0 as 64-bit
Date: Mon, 17 Mar 2025 17:57:30 +0000 [thread overview]
Message-ID: <114cc3ee-3bc5-463c-9355-6dd5d69825d6@nvidia.com> (raw)
In-Reply-To: <20250317095703.1661633-2-cassel@kernel.org>
On 3/17/25 02:57, Niklas Cassel wrote:
> NVMe PCIe Transport Specification 1.1, section 2.1.10, claims that the
> BAR0 type is Implementation Specific.
>
> However, in NVMe 1.1, the type is required to be 64-bit.
>
> Thus, to make our PCI EPF work on as many host systems as possible,
> always configure the BAR0 type to be 64-bit.
>
> In the rare case that the underlying PCI EPC does not support configuring
> BAR0 as 64-bit, the call to pci_epc_set_bar() will fail, and we will
> return a failure back to the user.
>
> This should not be a problem, as most PCI EPCs support configuring a BAR
> as 64-bit (and those EPCs with .only_64bit set to true in epc_features
> only support configuring the BAR as 64-bit).
>
> Tested-by: Damien Le Moal<dlemoal@kernel.org>
> Fixes: 0faa0fe6f90e ("nvmet: New NVMe PCI endpoint function target driver")
> Signed-off-by: Niklas Cassel<cassel@kernel.org>
Looks good.
Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com>
-ck
next prev parent reply other threads:[~2025-03-17 18:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-17 9:57 [PATCH v2] nvmet: pci-epf: Always configure BAR0 as 64-bit Niklas Cassel
2025-03-17 17:57 ` Chaitanya Kulkarni [this message]
2025-03-18 5:49 ` Christoph Hellwig
2025-03-18 15:46 ` Keith Busch
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