From: Niklas Cassel <cassel@kernel.org>
To: "Christoph Hellwig" <hch@lst.de>,
"Sagi Grimberg" <sagi@grimberg.me>,
"Chaitanya Kulkarni" <kch@nvidia.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Keith Busch" <kbusch@kernel.org>
Cc: Niklas Cassel <cassel@kernel.org>, linux-nvme@lists.infradead.org
Subject: [PATCH v2] nvmet: pci-epf: Always configure BAR0 as 64-bit
Date: Mon, 17 Mar 2025 10:57:04 +0100 [thread overview]
Message-ID: <20250317095703.1661633-2-cassel@kernel.org> (raw)
NVMe PCIe Transport Specification 1.1, section 2.1.10, claims that the
BAR0 type is Implementation Specific.
However, in NVMe 1.1, the type is required to be 64-bit.
Thus, to make our PCI EPF work on as many host systems as possible,
always configure the BAR0 type to be 64-bit.
In the rare case that the underlying PCI EPC does not support configuring
BAR0 as 64-bit, the call to pci_epc_set_bar() will fail, and we will
return a failure back to the user.
This should not be a problem, as most PCI EPCs support configuring a BAR
as 64-bit (and those EPCs with .only_64bit set to true in epc_features
only support configuring the BAR as 64-bit).
Tested-by: Damien Le Moal <dlemoal@kernel.org>
Fixes: 0faa0fe6f90e ("nvmet: New NVMe PCI endpoint function target driver")
Signed-off-by: Niklas Cassel <cassel@kernel.org>
---
Changes since v1:
-Added Fixes-tag.
-Picked up tags.
drivers/nvme/target/pci-epf.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/nvme/target/pci-epf.c b/drivers/nvme/target/pci-epf.c
index 0136df45ca275..a24f6549c0d15 100644
--- a/drivers/nvme/target/pci-epf.c
+++ b/drivers/nvme/target/pci-epf.c
@@ -2096,8 +2096,15 @@ static int nvmet_pci_epf_configure_bar(struct nvmet_pci_epf *nvme_epf)
return -ENODEV;
}
- if (epc_features->bar[BAR_0].only_64bit)
- epf->bar[BAR_0].flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
+ /*
+ * While NVMe PCIe Transport Specification 1.1, section 2.1.10, claims
+ * that the BAR0 type is Implementation Specific, in NVMe 1.1, the type
+ * is required to be 64-bit. Thus, for interoperability, always set the
+ * type to 64-bit. In the rare case that the PCI EPC does not support
+ * configuring BAR0 as 64-bit, the call to pci_epc_set_bar() will fail,
+ * and we will return failure back to the user.
+ */
+ epf->bar[BAR_0].flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
/*
* Calculate the size of the register bar: NVMe registers first with
--
2.48.1
next reply other threads:[~2025-03-17 9:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-17 9:57 Niklas Cassel [this message]
2025-03-17 17:57 ` [PATCH v2] nvmet: pci-epf: Always configure BAR0 as 64-bit Chaitanya Kulkarni
2025-03-18 5:49 ` Christoph Hellwig
2025-03-18 15:46 ` Keith Busch
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