From: Keith Busch <kbusch@meta.com>
To: <linux-nvme@lists.infradead.org>, <hch@lst.de>, <sagi@grimberg.me>
Cc: Keith Busch <kbusch@kernel.org>
Subject: [PATCH] nvme: remove CC register read-back during enabling
Date: Wed, 4 Sep 2024 14:54:05 -0700 [thread overview]
Message-ID: <20240904215405.1980512-1-kbusch@meta.com> (raw)
From: Keith Busch <kbusch@kernel.org>
Any non-posted read should flush the previous write, so we don't
necessarily need to read back the value we just wrote. I've found at
least some controllers that respond with 0 for short moments after
writing the CC register with EN (enable) cleared, so the read-back is
overwriting our valid ctrl_config value and ends up breaking on the
subsequent enabling.
Signed-off-by: Keith Busch <kbusch@kernel.org>
---
drivers/nvme/host/core.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index 983909a600adb..3172d7dab43bb 100644
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -2467,11 +2467,6 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
if (ret)
return ret;
- /* Flush write to device (required if transport is PCI) */
- ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
- if (ret)
- return ret;
-
/* CAP value may change after initial CC write */
ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
if (ret)
--
2.43.5
next reply other threads:[~2024-09-04 21:54 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 21:54 Keith Busch [this message]
2024-09-23 8:03 ` [PATCH] nvme: remove CC register read-back during enabling Keith Busch
2024-09-23 12:05 ` Christoph Hellwig
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