From: Keith Busch <kbusch@kernel.org>
To: Keith Busch <kbusch@meta.com>
Cc: linux-nvme@lists.infradead.org, hch@lst.de, sagi@grimberg.me
Subject: Re: [PATCH] nvme: remove CC register read-back during enabling
Date: Mon, 23 Sep 2024 10:03:32 +0200 [thread overview]
Message-ID: <ZvEg1Fq6wy7eQ5VV@kbusch-mbp> (raw)
In-Reply-To: <20240904215405.1980512-1-kbusch@meta.com>
On Wed, Sep 04, 2024 at 02:54:05PM -0700, Keith Busch wrote:
> From: Keith Busch <kbusch@kernel.org>
>
> Any non-posted read should flush the previous write, so we don't
> necessarily need to read back the value we just wrote. I've found at
> least some controllers that respond with 0 for short moments after
> writing the CC register with EN (enable) cleared, so the read-back is
> overwriting our valid ctrl_config value and ends up breaking on the
> subsequent enabling.
Ping on this one. Looks okay?
> diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
> index 983909a600adb..3172d7dab43bb 100644
> --- a/drivers/nvme/host/core.c
> +++ b/drivers/nvme/host/core.c
> @@ -2467,11 +2467,6 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
> if (ret)
> return ret;
>
> - /* Flush write to device (required if transport is PCI) */
> - ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
> - if (ret)
> - return ret;
> -
> /* CAP value may change after initial CC write */
> ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
> if (ret)
> --
> 2.43.5
>
next prev parent reply other threads:[~2024-09-23 8:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 21:54 [PATCH] nvme: remove CC register read-back during enabling Keith Busch
2024-09-23 8:03 ` Keith Busch [this message]
2024-09-23 12:05 ` Christoph Hellwig
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