From: Greg KH <gregkh@linuxfoundation.org>
To: Gwendal Grignou <gwendal@chromium.org>
Cc: bob.beckett@collabora.com, hch@lst.de, kbusch@kernel.org,
kbusch@meta.com, linux-nvme@lists.infradead.org,
sagi@grimberg.me, stable@vger.kernel.org
Subject: Re: [PATCH] nvme-pci: Remove O2 Queue Depth quirk
Date: Tue, 29 Oct 2024 03:52:23 +0100 [thread overview]
Message-ID: <2024102948-granddad-exchange-3c05@gregkh> (raw)
In-Reply-To: <20241029024236.2702721-1-gwendal@chromium.org>
On Mon, Oct 28, 2024 at 07:42:36PM -0700, Gwendal Grignou wrote:
> PCI_DEVICE(0x1217, 0x8760) (O2 Micro, Inc. FORESEE E2M2 NVMe SSD)
> is a NMVe to eMMC bridge, that can be used with different eMMC
> memory devices.
> The NVMe device name contains the eMMC device name, for instance:
> `BAYHUB SanDisk-DA4128-91904055-128GB`
>
> The bridge is known to work with many eMMC devices, we need to limit
> the queue depth once we know which eMMC device is behind the bridge.
>
> Fixes: commit 83bdfcbdbe5d ("nvme-pci: qdepth 1 quirk")
Nit, no need for "commit" here, and no blank line after this one.
thanks,
greg k-h
next prev parent reply other threads:[~2024-10-29 2:52 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 17:46 [PATCH] nvme-pci: qdepth 1 quirk Keith Busch
2024-09-12 6:57 ` Christoph Hellwig
2024-09-12 16:30 ` Robert Beckett
2024-10-29 2:42 ` [PATCH] nvme-pci: Remove O2 Queue Depth quirk Gwendal Grignou
2024-10-29 2:52 ` Greg KH [this message]
2024-10-29 7:41 ` Christoph Hellwig
2024-10-29 18:58 ` Gwendal Grignou
2024-10-29 19:16 ` Keith Busch
2024-11-07 16:50 ` [PATCH] nvme-pci: 512 byte dma pool segment quirk Bob Beckett
2024-11-07 17:19 ` Keith Busch
2024-11-07 17:35 ` Robert Beckett
2024-11-08 7:08 ` Christoph Hellwig
2024-10-29 19:18 ` [PATCH] nvme-pci: Remove O2 Queue Depth quirk Robert Beckett
2024-12-05 21:53 ` Gwendal Grignou
2024-12-05 22:03 ` Keith Busch
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