Re: [PATCH] nvme-pci: expose active quirks in sysfs

[Chaitanya Kulkarni <chaitanyak@nvidia.com>]

On 10/29/25 01:02, Maurizio Lombardi wrote:
> On Wed Oct 29, 2025 at 6:47 AM CET, Chaitanya Kulkarni wrote:
>> On 10/28/25 10:00, Maurizio Lombardi wrote:
>>> On Tue Oct 28, 2025 at 5:32 PM CET, Bart Van Assche wrote:
>>>> On 10/28/25 7:29 AM, Maurizio Lombardi wrote:
>>>>> Currently, there is no straightforward way for a user to inspect
>>>>> the quirks value from userspace.
>>>>> Add a new read-only sysfs attribute "quirks";
>>>>> reading this file will display the hexadecimal
>>>>> value of the ctrl->quirks bitmask for the given NVMe device.
>>>> This patch changes the constants in enum nvme_quirks from
>>>> kernel-internal constants into an ABI. I'm not sure that's what we
>>>> want.
>>> I understand your concern.
>>> I could respin it to export the names of the active quirks
>>> rather than the raw bitmask, if there is an interest in having
>>> this feature.
>>>
>>> Maurizio
>>>
>> question here: do we need to care about some kind of security before we
>> expose controller information that is internal to the driver ?
>> CAP_SYS_ADMIN ? -ck
> IMO I don't think it's an information that needs to be hidden.
> After all, any user could run "lscpi -nn", get the vendor and device
> id and cross-reference them with the pci table in the source code
> to get the enabled quirks, this sysfs entry would just make it faster.
>
> Maurizio

Yes it is definitely useful after only decoding :-

linux-block (for-next) # cat /sys/class/nvme/nvme0/quirks
0x0000000000040000

Active quirks:
   BOGUS_NID
linux-block (for-next) #


diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index c916176bd9f0..1b9ad818b12d 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -2497,6 +2497,80 @@ static ssize_t cmbsz_show(struct device *dev, struct device_attribute *attr,
  }
  static DEVICE_ATTR_RO(cmbsz);
  
+static int nvme_get_quirks_string(unsigned long quirks, char *buf, size_t buf_len)
+{
+	size_t len = 0;
+
+	if (!quirks) {
+		len = scnprintf(buf, buf_len, "No quirks enabled\n");
+		return len;
+	}
+
+	len += scnprintf(buf + len, buf_len - len, "Active quirks:\n");
+
+	if (quirks & NVME_QUIRK_STRIPE_SIZE)
+		len += scnprintf(buf + len, buf_len - len, "  STRIPE_SIZE\n");
+	if (quirks & NVME_QUIRK_IDENTIFY_CNS)
+		len += scnprintf(buf + len, buf_len - len, "  IDENTIFY_CNS\n");
+	if (quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
+		len += scnprintf(buf + len, buf_len - len, "  DEALLOCATE_ZEROES\n");
+	if (quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
+		len += scnprintf(buf + len, buf_len - len, "  DELAY_BEFORE_CHK_RDY\n");
+	if (quirks & NVME_QUIRK_NO_APST)
+		len += scnprintf(buf + len, buf_len - len, "  NO_APST\n");
+	if (quirks & NVME_QUIRK_NO_DEEPEST_PS)
+		len += scnprintf(buf + len, buf_len - len, "  NO_DEEPEST_PS\n");
+	if (quirks & NVME_QUIRK_QDEPTH_ONE)
+		len += scnprintf(buf + len, buf_len - len, "  QDEPTH_ONE\n");
+	if (quirks & NVME_QUIRK_MEDIUM_PRIO_SQ)
+		len += scnprintf(buf + len, buf_len - len, "  MEDIUM_PRIO_SQ\n");
+	if (quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)
+		len += scnprintf(buf + len, buf_len - len, "  IGNORE_DEV_SUBNQN\n");
+	if (quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)
+		len += scnprintf(buf + len, buf_len - len, "  DISABLE_WRITE_ZEROES\n");
+	if (quirks & NVME_QUIRK_SIMPLE_SUSPEND)
+		len += scnprintf(buf + len, buf_len - len, "  SIMPLE_SUSPEND\n");
+	if (quirks & NVME_QUIRK_SINGLE_VECTOR)
+		len += scnprintf(buf + len, buf_len - len, "  SINGLE_VECTOR\n");
+	if (quirks & NVME_QUIRK_128_BYTES_SQES)
+		len += scnprintf(buf + len, buf_len - len, "  128_BYTES_SQES\n");
+	if (quirks & NVME_QUIRK_SHARED_TAGS)
+		len += scnprintf(buf + len, buf_len - len, "  SHARED_TAGS\n");
+	if (quirks & NVME_QUIRK_NO_TEMP_THRESH_CHANGE)
+		len += scnprintf(buf + len, buf_len - len, "  NO_TEMP_THRESH_CHANGE\n");
+	if (quirks & NVME_QUIRK_NO_NS_DESC_LIST)
+		len += scnprintf(buf + len, buf_len - len, "  NO_NS_DESC_LIST\n");
+	if (quirks & NVME_QUIRK_DMA_ADDRESS_BITS_48)
+		len += scnprintf(buf + len, buf_len - len, "  DMA_ADDRESS_BITS_48\n");
+	if (quirks & NVME_QUIRK_SKIP_CID_GEN)
+		len += scnprintf(buf + len, buf_len - len, "  SKIP_CID_GEN\n");
+	if (quirks & NVME_QUIRK_BOGUS_NID)
+		len += scnprintf(buf + len, buf_len - len, "  BOGUS_NID\n");
+	if (quirks & NVME_QUIRK_NO_SECONDARY_TEMP_THRESH)
+		len += scnprintf(buf + len, buf_len - len, "  NO_SECONDARY_TEMP_THRESH\n");
+	if (quirks & NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND)
+		len += scnprintf(buf + len, buf_len - len, "  FORCE_NO_SIMPLE_SUSPEND\n");
+	if (quirks & NVME_QUIRK_BROKEN_MSI)
+		len += scnprintf(buf + len, buf_len - len, "  BROKEN_MSI\n");
+	if (quirks & NVME_QUIRK_DMAPOOL_ALIGN_512)
+		len += scnprintf(buf + len, buf_len - len, "  DMAPOOL_ALIGN_512\n");
+
+	return len;
+}
+
+static ssize_t quirks_show(struct device *dev, struct device_attribute *attr,
+			   char *buf)
+{
+	struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev));
+	int len;
+
+	len = sysfs_emit(buf, "0x%016lx\n\n", ndev->ctrl.quirks);
+	len += nvme_get_quirks_string(ndev->ctrl.quirks, buf + len, PAGE_SIZE - len);
+
+	return len;
+}
+static DEVICE_ATTR_RO(quirks);
+
  static ssize_t hmb_show(struct device *dev, struct device_attribute *attr,
  			char *buf)
  {
@@ -2557,6 +2631,7 @@ static struct attribute *nvme_pci_attrs[] = {
  	&dev_attr_cmbloc.attr,
  	&dev_attr_cmbsz.attr,
  	&dev_attr_hmb.attr,
+	&dev_attr_quirks.attr,
  	NULL,
  };
  
-- 
2.40.0