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From: "Maurizio Lombardi" <mlombard@bsdbackstore.eu>
To: "Chaitanya Kulkarni" <chaitanyak@nvidia.com>,
	"Maurizio Lombardi" <mlombard@redhat.com>
Cc: "bgurney@redhat.com" <bgurney@redhat.com>,
	"linux-nvme@lists.infradead.org" <linux-nvme@lists.infradead.org>,
	"kbusch@kernel.org" <kbusch@kernel.org>,
	"Bart Van Assche" <bvanassche@acm.org>
Subject: Re: [PATCH] nvme-pci: expose active quirks in sysfs
Date: Thu, 30 Oct 2025 07:55:02 +0100	[thread overview]
Message-ID: <DDVGKDJIDXG1.1KGMHIAQH3GVS@bsdbackstore.eu> (raw)
In-Reply-To: <f0bf5480-c66c-45a5-ae85-5bc0ff1bc172@nvidia.com>

On Thu Oct 30, 2025 at 7:46 AM CET, Chaitanya Kulkarni wrote:
> On 10/29/25 23:18, Maurizio Lombardi wrote:
>
> how about something like this totally untested ?
>
> drivers/nvme/host/pci.c | 64 +++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 64 insertions(+)
>
> diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
> index c916176bd9f0..ea9904e2dbd9 100644
> --- a/drivers/nvme/host/pci.c
> +++ b/drivers/nvme/host/pci.c
> @@ -2497,6 +2497,69 @@ static ssize_t cmbsz_show(struct device *dev, 
> struct device_attribute *attr,
>   }
>   static DEVICE_ATTR_RO(cmbsz);
>
> +static const struct {
> +    unsigned long quirk;
> +    const char *name;
> +} nvme_quirk_info[] = {
> +    { NVME_QUIRK_STRIPE_SIZE,        "STRIPE_SIZE" },
> +    { NVME_QUIRK_IDENTIFY_CNS,        "IDENTIFY_CNS" },
> +    { NVME_QUIRK_DEALLOCATE_ZEROES,        "DEALLOCATE_ZEROES" },
> +    { NVME_QUIRK_DELAY_BEFORE_CHK_RDY, "DELAY_BEFORE_CHK_RDY" },
> +    { NVME_QUIRK_NO_APST,            "NO_APST" },
> +    { NVME_QUIRK_NO_DEEPEST_PS,        "NO_DEEPEST_PS" },
> +    { NVME_QUIRK_QDEPTH_ONE,        "QDEPTH_ONE" },
> +    { NVME_QUIRK_MEDIUM_PRIO_SQ,        "MEDIUM_PRIO_SQ" },
> +    { NVME_QUIRK_IGNORE_DEV_SUBNQN,        "IGNORE_DEV_SUBNQN" },
> +    { NVME_QUIRK_DISABLE_WRITE_ZEROES, "DISABLE_WRITE_ZEROES" },
> +    { NVME_QUIRK_SIMPLE_SUSPEND,        "SIMPLE_SUSPEND" },
> +    { NVME_QUIRK_SINGLE_VECTOR,        "SINGLE_VECTOR" },
> +    { NVME_QUIRK_128_BYTES_SQES,        "128_BYTES_SQES" },
> +    { NVME_QUIRK_SHARED_TAGS,        "SHARED_TAGS" },
> +    { NVME_QUIRK_NO_TEMP_THRESH_CHANGE, "NO_TEMP_THRESH_CHANGE" },
> +    { NVME_QUIRK_NO_NS_DESC_LIST,        "NO_NS_DESC_LIST" },
> +    { NVME_QUIRK_DMA_ADDRESS_BITS_48,    "DMA_ADDRESS_BITS_48" },
> +    { NVME_QUIRK_SKIP_CID_GEN,        "SKIP_CID_GEN" },
> +    { NVME_QUIRK_BOGUS_NID,            "BOGUS_NID" },
> +    { NVME_QUIRK_NO_SECONDARY_TEMP_THRESH, "NO_SECONDARY_TEMP_THRESH" },
> +    { NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND, "FORCE_NO_SIMPLE_SUSPEND" },
> +    { NVME_QUIRK_BROKEN_MSI,        "BROKEN_MSI" },
> +    { NVME_QUIRK_DMAPOOL_ALIGN_512,        "DMAPOOL_ALIGN_512" },
> +};

Hmm, NVME_QUIRK_DMAPOOL_ALIGN_512 is "1 << 22", wouldn't this create 
an enormous array?

Maurizio

> +
> +static int nvme_get_quirks_string(unsigned long quirks, char *buf, 
> size_t buf_len)
> +{
> +    size_t len = 0;
> +    int i;
> +
> +    if (!quirks) {
> +        len = scnprintf(buf, buf_len, "No quirks enabled\n");
> +        return len;
> +    }
> +
> +    len += scnprintf(buf + len, buf_len - len, "Active quirks:\n");
> +
> +    for (i = 0; i < ARRAY_SIZE(nvme_quirk_info); i++) {
> +        if (quirks & nvme_quirk_info[i].quirk)
> +            len += scnprintf(buf + len, buf_len - len, " %s\n",
> +                     nvme_quirk_info[i].name);
> +    }
> +
> +    return len;
> +}
> +
> +static ssize_t quirks_show(struct device *dev, struct device_attribute 
> *attr,
> +               char *buf)
> +{
> +    struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev));
> +    int len;
> +
> +    len = sysfs_emit(buf, "0x%016lx\n\n", ndev->ctrl.quirks);
> +    len += nvme_get_quirks_string(ndev->ctrl.quirks, buf + len, 
> PAGE_SIZE - len);
> +
> +    return len;
> +}
> +static DEVICE_ATTR_RO(quirks);
> +
>   static ssize_t hmb_show(struct device *dev, struct device_attribute *attr,
>               char *buf)
>   {
> @@ -2557,6 +2620,7 @@ static struct attribute *nvme_pci_attrs[] = {
>       &dev_attr_cmbloc.attr,
>       &dev_attr_cmbsz.attr,
>       &dev_attr_hmb.attr,
> +    &dev_attr_quirks.attr,
>       NULL,
>   };



  reply	other threads:[~2025-10-30  6:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-28 14:29 [PATCH] nvme-pci: expose active quirks in sysfs Maurizio Lombardi
2025-10-28 16:32 ` Bart Van Assche
2025-10-28 17:00   ` Maurizio Lombardi
2025-10-29  5:47     ` Chaitanya Kulkarni
2025-10-29  8:02       ` Maurizio Lombardi
2025-10-29 23:25         ` Chaitanya Kulkarni
2025-10-30  6:18           ` Maurizio Lombardi
2025-10-30  6:46             ` Chaitanya Kulkarni
2025-10-30  6:55               ` Maurizio Lombardi [this message]
2025-10-30  6:57                 ` Maurizio Lombardi

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