From: martin.petersen@oracle.com (Martin K. Petersen)
Subject: [PATCH] nvme: Quirks for PM1725 controllers
Date: Sat, 01 Jul 2017 17:31:17 -0400 [thread overview]
Message-ID: <yq17ezrvo7u.fsf@oracle.com> (raw)
In-Reply-To: <20170628022757.32309-1-martin.petersen@oracle.com> (Martin K. Petersen's message of "Tue, 27 Jun 2017 22:27:57 -0400")
> PM1725 controllers have a couple of quirks that need to be handled in
> the driver:
>
> - I/O queue depth must be limited to 64 entries on controllers that do
> not report MQES.
>
> - The host interface registers go offline briefly while resetting the
> chip. Thus a delay is needed before checking whether the controller
> is ready.
>
> Note that the admin queue depth is also limited to 64 on older versions
> of this board. Since our NVME_AQ_DEPTH is now 32 that is no longer an
> issue.
Discussed this with Keith privately and he prefers the current
non-quirks approach to limiting the queue depth.
Thus no changes needed, please review/apply.
--
Martin K. Petersen Oracle Linux Engineering
prev parent reply other threads:[~2017-07-01 21:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-28 2:27 [PATCH] nvme: Quirks for PM1725 controllers Martin K. Petersen
2017-06-28 7:27 ` Sagi Grimberg
2017-06-28 16:44 ` Keith Busch
2017-06-28 16:51 ` Martin K. Petersen
2017-07-01 21:31 ` Martin K. Petersen [this message]
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