Re: [PATCH] OMAPDSS: Add timings for ChiMei G121S1-L01/L02 and G121X1-L01 LCD displays

[Tomi Valkeinen <tomi.valkeinen@ti.com>]

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On Fri, 2012-08-24 at 09:50 -0400, Raphaël Assénat wrote:

> But internally, perhaps with the exception of the "DE only" operation,
> all the same concepts apply. LVDS is just only one extra layer used to
> transmit the parallel data more effectively (differential, less
> conductors, etc).
> 
> Consider the case where an LVDS transmitter is used on the main board
> in conjunction with a remote LVDS receiver on a board connected to
> a "true" DPI panel as follows:
> 
> [OMAPDSS -> LVDS XMIT] -> [long cable] -> [LVDS RXCV -> DPI Panel]
> |    parallel        |     lvds serial    |        parallel      |
> 
> Given the above use case, adding a new panel to panel-generic-dpi.c would
> be obvious since doing without LVDS and driving the panel directly may
> still happen if a specific design does not benefit from the use of LVDS.
> 
> There are a few different conventions for LVDS transmission where the total
> number of bits transmitted by pairs as well as the bit order varies. The
> hardware designer selects a compatible pair of chips based on the number of
> color bits the panel supports and other factors. But no matter which are
> selected and how they are wired, the LVDS layer remains transparent to the
> graphics controller and the panel.
> 
> My situation is only different from the above by the fact that our panels
> have an LVDS receiver built-in, which means the choice of transmitter is
> limited to what will be compatible and that a specific bit order (i.e.
> wiring)
> must be observed. This is why I tend to consider those LVDS panels simply
> as DPI panels having a built-in LVDS receiver.

In your case the LVDS panels are "dummy", and require no configuration,
and thus look like DPI panels.

But consider an LVDS panel which can be controlled via, say, i2c, and
you can configure the number of LVDS lanes used.

And consider a SoC with LVDS transmitter, which again needs to be
configured depending on the LVDS lanes used (and probably some other
parameters).

In those cases the use doesn't look like DPI anymore.

> > If you had just one panel and DPI-to-LVDS chip, I'd suggest to create a
> > combined driver which handles both the chip and the panel. But you have
> > two chips and three panels...
> 
> I'm not sure what the chip driver would do. The LVDS layer is totally
> transparent to the operation. Why would the kernel need to be aware of
> which chip is used?

The chip must require power to operate, so it needs to enable
regulators. For example, SN75LVDS83B requires VCC, IOVCC, PLLVCC,
LVDSVCC. In your case the regulators may be always-on regulators, but a
driver cannot make such assumptions.

> One thing that might be useful would be the ability to control the
> enable pin, but this is not different from the enable pin on a level shifter
> placed between the OMAP and a real DPI panel. At the moment, our userspace
> software simply controls this using a GPIO.

Yes, the driver should also handle the enable GPIO (for the DPI case
also).

Now, as I said, the current omapdss model doesn't really allow
"chaining" of display devices, so you can't currently create proper
drivers. That's why I'm not sure what to do. It would be nice to support
your boards, but on the other hand, I think it's not correct to add
these panels.

 Tomi


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