* regarding arm: update ARM_ERRATA_430973 Kconfig
@ 2013-03-26 11:57 Peter Meerwald
2013-03-28 11:19 ` Tim Niemeyer
0 siblings, 1 reply; 2+ messages in thread
From: Peter Meerwald @ 2013-03-26 11:57 UTC (permalink / raw)
To: Tim Niemeyer, Thomas Weber; +Cc: linux-kernel, linux-omap
Hello,
regarding your patch against arch/arm/Kconfig:
@@ -1215,7 +1215,7 @@ config ARM_ERRATA_430973
depends on CPU_V7
help
This option enables the workaround for the 430973 Cortex-A8
- (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
+ (r1p*) erratum. If a code sequence containing an ARM/Thumb
interworking branch is replaced with another code sequence at the
same virtual address, whether due to self-modifying code or virtual
to physical address re-mapping, Cortex-A8 does not recover from the
I am seeing strange segfault/illegal instructions fixed by enabling
ARM_ERRATA_430973 on a TI OMAP3 DM3730, r3p2 IMHO (see below)
ARM_ERRATA_430973 is relevant for which processors? have you checked the
errata list? I had no luck obtaining it yet
cat /proc/cpuinfo
Processor : ARMv7 Processor rev 2 (v7l)
BogoMIPS : 313.29
Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x3
CPU part : 0xc08
CPU revision : 2
thanks, p.
--
Peter Meerwald
+43-664-2444418 (mobile)
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: regarding arm: update ARM_ERRATA_430973 Kconfig
2013-03-26 11:57 regarding arm: update ARM_ERRATA_430973 Kconfig Peter Meerwald
@ 2013-03-28 11:19 ` Tim Niemeyer
0 siblings, 0 replies; 2+ messages in thread
From: Tim Niemeyer @ 2013-03-28 11:19 UTC (permalink / raw)
To: Peter Meerwald; +Cc: Thomas Weber, linux-kernel, linux-omap
Hi
Am Dienstag, den 26.03.2013, 12:57 +0100 schrieb Peter Meerwald:
> regarding your patch against arch/arm/Kconfig:
>
> @@ -1215,7 +1215,7 @@ config ARM_ERRATA_430973
> depends on CPU_V7
> help
> This option enables the workaround for the 430973 Cortex-A8
> - (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
> + (r1p*) erratum. If a code sequence containing an ARM/Thumb
> interworking branch is replaced with another code sequence at the
> same virtual address, whether due to self-modifying code or virtual
> to physical address re-mapping, Cortex-A8 does not recover from the
>
>
> I am seeing strange segfault/illegal instructions fixed by enabling
> ARM_ERRATA_430973 on a TI OMAP3 DM3730, r3p2 IMHO (see below)
The only information i have is that it was fixed in r2p1. The statement
is from mru on:
http://www.beagleboard.org/irclogs/index.php?date=2013-02-18#T15:00:07
> ARM_ERRATA_430973 is relevant for which processors? have you checked the
> errata list? I had no luck obtaining it yet
No, i don't have it either.
--
Tim Niemeyer
Corscience GmbH & Co. KG
Henkestr. 91
D-91052 Erlangen
Germany
e-mail: tim.niemeyer@corscience.de
Internet: www.corscience.de
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