Re: [hppa-linux] Qn on PA-RISC Page tables and TLB

[Craig Hada <chada@cup.hp.com>]

> 
> On Thu, 25 Mar 1999, Craig Hada wrote:
> > > 
> > 
> > In the absense of a harware TLB walker, the page directory format can be
> > structured by software to fit its needs. However, the TLB miss handler
> > must reformat the bits to fit the format of the TLB insert instructions.
> > To get maximum performace from the system, the TLB miss handlers must be
> > made very efficient. The format of the page directory entry in the PA-RISC 
> > Arch 1.1 book minimizes the work of the TLB miss handlers by aligning the
> > fields to match the format of the TLB insert instructions.
> > > 	
> > > 
> Is it necessary that the virtual to physical mappings in TLB be inserted
> only in a tlb miss fault. Can I insert  entries in the anticipation that
> there will be a fault soon, for example when I first enable 
> virtual mode ? If not, there is a potential chicken and egg problem
> because I will get a TLB miss fault as soon as I turn virtual mode on and
> TLB miss fault handler has to run in virtual mode with translations
> on.....and there aint any tranlations yet inserted ...you get the pitcure
> 
> 							-pkd
> 
> 
Under HP-UX, the TLB miss handler runs in real mode (data and code translation
disabled) so there is no need to have a virtual translation for the code 
representing the TLB miss handler or the page directory (both are equivalently
mapped). If a translation is not found in the page directory, then you enter
virtual mode to handle the page fault.

You can speculatively insert entries into the TLB but you also may be
replacing entries that are soon to be used. Since the TLB replacement 
algorithm is not documented, you are probably better off just inserting
the missed upon translation.

-Craig 

> 
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