Re: [parisc-linux] lasi scsi driver

[Grant Grundler <grundler@cup.hp.com>]

willy@thepuffingroup.com wrote:
> That isn't necessarily a problem.  The interface requires the allocation
> of pages which are coherent.  On recent architectures, it's possible to
> allocate pages which are actually IO coherent.  On earlier architectures,
> the same interface would return uncached pages.  The question is
> whether there are any implementations which can do neither of the two
> possibilities.

That's basically correct. Let's start talking about implementations.

HP systems have three I/O MMU's which are I/O coherent: U2/Uturn,
Astro/Ike, and Epic/SAGA.  AFAIK, all systems using one on them have
the processor(s) connected to a "Runway" bus.  This limits what
processor model those systems can have: PA-7200, -8000, -8200, or -8500.

(Caveats:
 - T-class has something similar to U2 which is NOT I/O coherent
 - V-class (EPIC/SAGA) is probably supportable with some limitations
)

In personal conversations, two knowledgable folks have suggested
the following:
o PA-7100LC systems support uncacheable memory and subcacheline access.
  So these boxes should be supportable.

o PA-7300LC systems *might* support uncacheable memory and subcacheline...
  (Could anyone definitively answer this for any PA-7300LC box?)

o PA-7000 systems are pretty much SOL.
  (But they could be perfectly useful if folks add cache flushing to
   the few device drivers needed for graphics and stuff off of LASI.)

In summary, the number of "unsupportable" systems isn't as big
as I first thought.

thanks,
grant

Grant Grundler
Unix Development Lab
+1.408.447.7253