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* [parisc-linux] some questions
@ 2000-03-26 21:44 M. Grabert
  2000-03-26 23:52 ` willy
  0 siblings, 1 reply; 5+ messages in thread
From: M. Grabert @ 2000-03-26 21:44 UTC (permalink / raw)
  To: parisc-linux

Hi there,
some questions for you ...

- what will be the minimum memory requirements for
linux/HPPA on a 735/99 ? (with and w/o X)

- IMHO there is no usable free X server for linux/HPPA,
(for my 735) but i think a have working binary of XFree for 
hpux10.10 laying around here. If this is true, and the source
code is available, is this going to be difficult to port it to
linux/HPPA ? (perhaps i'll try it out, some time in future)

- AFAIK is the (first) main target the HP9000/7xx series.
I have also a HP9000/800/F10 (8MB) laying around here,
which i don't need anymore, so if you want it ...
.. there is just the problem of transport

- what filesystems are supported ?
is only nfs supported yet ?


greetings max


PS:
i'm a (poor ;) student of computer science in ratisbon,
germany, a i just have 16MB for my 735. Addidional 64MB would
cost about 350$ i think. Some sponsors *grin* ?
Or some ideas where i can get some memory real cheap ?

PPS: great work you're doing!

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [parisc-linux] Some Questions...
@ 2001-11-04 21:28 Daniel Engstrom
  2001-11-05  6:59 ` Grant Grundler
  0 siblings, 1 reply; 5+ messages in thread
From: Daniel Engstrom @ 2001-11-04 21:28 UTC (permalink / raw)
  To: parisc-linux; +Cc: 5116

Hello all, 

I have some qustions regarding the EISA support and other stuff.

1) Non sharable interrupts
ISA IRQ are edge triggered and inherently un-sharable. Should 
there be a flag-field attached to the irq region struct which
reports the sharability of an irq?

2) ISR Re-entrance
I think that an IRQ manager needs to mask the IRQ while serviceing it
to avoid reentring the ISR(s). Is this done for non-EISA irq manager on 
palinux?

3) String I/O implementation
The string I/O functions (insl/outsl and friends) are implemented in 
terms of inl/outl and so on. This means that the HPA switch code in 
arch/parisc/kernel/pci.c is executed once per word in the transfer.
If the pci_hba_data struct had entries for these the test would have 
been done outside of the loop.

4) EISA EEPROM format
I have not yet fully understood the fromat of the EISA configuration 
EEPROM located on the system board. 
Could anyone fill-in with how the EISA slot configuration space should be 
decoded. I have figured out the general header and the fixed part of the 
per-slot structure.

5) EISA Memory Mapping/DMA stuff
I'd like to make something here too, any pointer to how to proceed?
What I thnk I have figured out is the following:
It seems like that from the EISA side the window is 4MB starting at 
1MB. From the host side the window seem to start at 0xfc100000 and be 
1.75MB in size.
How is the window controlled?

/Daniel

-- 

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2001-11-05  7:03 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2000-03-26 21:44 [parisc-linux] some questions M. Grabert
2000-03-26 23:52 ` willy
2000-03-27 18:54   ` Steven Pritchard
  -- strict thread matches above, loose matches on Subject: below --
2001-11-04 21:28 [parisc-linux] Some Questions Daniel Engstrom
2001-11-05  6:59 ` Grant Grundler

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