Re: [parisc-linux] Measuring kernel compile times on smp system.

Re: [parisc-linux] Measuring kernel compile times on smp system.

[Randolph Chung]

> To really understand these numbers, you need three things: the amount
> of memory on the system, the L2 (and L3?) cache sizes,

http://en.wikipedia.org/wiki/PA-RISC

"An interesting aspect of the PA-RISC line is that most of its
generations have no Level 2 cache. Instead large Level 1 caches are
used, formerly as separate chips connected by a bus, now integrated
on-chip. Only the PA-7100LC and PA-7300LC had L2 caches."

randolph
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Re: [parisc-linux] Measuring kernel compile times on smp system.

[Matthew Wilcox]

On Fri, Oct 28, 2005 at 10:08:19AM +0800, Randolph Chung wrote:
> > To really understand these numbers, you need three things: the amount
> > of memory on the system, the L2 (and L3?) cache sizes,
> 
> http://en.wikipedia.org/wiki/PA-RISC
> 
> "An interesting aspect of the PA-RISC line is that most of its
> generations have no Level 2 cache. Instead large Level 1 caches are
> used, formerly as separate chips connected by a bus, now integrated
> on-chip. Only the PA-7100LC and PA-7300LC had L2 caches."

Technically, PA-8800 and 8900 have an L2 cache.  However, it's completely
transparent to software.
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Re: [parisc-linux] Question about ccio and fdc request:

[Matthew Wilcox]

On Sat, Oct 29, 2005 at 06:02:53PM -0600, Grant Grundler wrote:
> No. Older PDC (pre-Astro) probably doesn't implement that bit.
> Sorry, I don't have time to investigate exactly which ones do
> besides the Astro boxes and PAT PDC.
> 
> And even for SBA, I'd like to make this self modifying code
> that writes a NOP over the FDC in if it detects the system
> doesn't need FDC. That would get rid of another branch in
> a critical code path.

Is it possible this bit is set incorrectly on PA8800 boxes and that's
the cause of our cache problems?

(I doubt it, but wouldn't it be nice if that were the case ;-)
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Re: [parisc-linux] Measuring kernel compile times on smp system.

[James Bottomley]

On Wed, 2005-10-26 at 23:06 -0600, Ryan Bradetich wrote:
> K460-smp(3):
> 	cold		44m36.961s	93m25.844s	35m37.427s
> 	warm		44m19.736s	93m9.127s	35m49.683s
> 
> K460-smp(4):
> 	cold		41m59.795s	114m6.654s	46m20.045s
> 	warm		41m39.792s	114m29.156s	46m6.385s

that's pretty bad 3->4 scaling.

Could you just check that you don't have irqbalanced running.  On a K or
D system, it would cause great inefficiencies in interrupt rethrowing.

Thanks,

James


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