* [PATCH] parisc: Unconditionally flush tlb entry in tmpalias functions
@ 2022-05-13 23:38 Helge Deller
2022-05-17 12:57 ` Helge Deller
0 siblings, 1 reply; 2+ messages in thread
From: Helge Deller @ 2022-05-13 23:38 UTC (permalink / raw)
To: linux-parisc, James Bottomley, John David Anglin
Drop the ALTERNATIVE() instructions in the tmpalias functions for the
32-bit kernel.
Functions which use the tmpalias mappings to flush/copy/invalidate
congruently mapped memory need to always flush the TLB entry prior
accessing the newly-to-be mapped memory areas. This is independed if
it's a SMP kernel or not. Otherwise the new memory mappings (stored in
r28 and possibly r23) won't get loaded into the TLB.
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: stable@vger.kernel.org
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index b4c3f01e2399..1cc55e668fe0 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -565,10 +565,8 @@ ENTRY_CFI(copy_user_page_asm)
pdtlb,l %r0(%r28)
pdtlb,l %r0(%r29)
#else
-0: pdtlb %r0(%r28)
-1: pdtlb %r0(%r29)
- ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
- ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
+ pdtlb %r0(%r28)
+ pdtlb %r0(%r29)
#endif
#ifdef CONFIG_64BIT
@@ -705,8 +703,7 @@ ENTRY_CFI(clear_user_page_asm)
#ifdef CONFIG_PA20
pdtlb,l %r0(%r28)
#else
-0: pdtlb %r0(%r28)
- ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
+ pdtlb %r0(%r28)
#endif
#ifdef CONFIG_64BIT
@@ -781,8 +778,7 @@ ENTRY_CFI(flush_dcache_page_asm)
#ifdef CONFIG_PA20
pdtlb,l %r0(%r28)
#else
-0: pdtlb %r0(%r28)
- ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
+ pdtlb %r0(%r28)
#endif
88: ldil L%dcache_stride, %r1
@@ -840,8 +836,7 @@ ENTRY_CFI(purge_dcache_page_asm)
#ifdef CONFIG_PA20
pdtlb,l %r0(%r28)
#else
-0: pdtlb %r0(%r28)
- ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
+ pdtlb %r0(%r28)
#endif
88: ldil L%dcache_stride, %r1
@@ -904,10 +899,8 @@ ENTRY_CFI(flush_icache_page_asm)
1: pitlb,l %r0(%sr4,%r28)
ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
#else
-0: pdtlb %r0(%r28)
+ pdtlb %r0(%r28)
1: pitlb %r0(%sr4,%r28)
- ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
- ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
#endif
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] parisc: Unconditionally flush tlb entry in tmpalias functions
2022-05-13 23:38 [PATCH] parisc: Unconditionally flush tlb entry in tmpalias functions Helge Deller
@ 2022-05-17 12:57 ` Helge Deller
0 siblings, 0 replies; 2+ messages in thread
From: Helge Deller @ 2022-05-17 12:57 UTC (permalink / raw)
To: linux-parisc, James Bottomley, John David Anglin
On 5/14/22 01:38, Helge Deller wrote:
> Drop the ALTERNATIVE() instructions in the tmpalias functions for the
> 32-bit kernel.
> Functions which use the tmpalias mappings to flush/copy/invalidate
> congruently mapped memory need to always flush the TLB entry prior
> accessing the newly-to-be mapped memory areas. This is independed if
> it's a SMP kernel or not. Otherwise the new memory mappings (stored in
> r28 and possibly r23) won't get loaded into the TLB.
>
> Signed-off-by: Helge Deller <deller@gmx.de>
> Cc: stable@vger.kernel.org
This patch is contra-productive.
The ALTERNATIVE() replacement will only trigger on PA20 CPUs, in
which case the pdtlb gets replaced by pdtlb,l - which is good because
we use the tmpalias mapping only on the local currently CPU.
Helge
> diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
> index b4c3f01e2399..1cc55e668fe0 100644
> --- a/arch/parisc/kernel/pacache.S
> +++ b/arch/parisc/kernel/pacache.S
> @@ -565,10 +565,8 @@ ENTRY_CFI(copy_user_page_asm)
> pdtlb,l %r0(%r28)
> pdtlb,l %r0(%r29)
> #else
> -0: pdtlb %r0(%r28)
> -1: pdtlb %r0(%r29)
> - ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> - ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> + pdtlb %r0(%r28)
> + pdtlb %r0(%r29)
> #endif
>
> #ifdef CONFIG_64BIT
> @@ -705,8 +703,7 @@ ENTRY_CFI(clear_user_page_asm)
> #ifdef CONFIG_PA20
> pdtlb,l %r0(%r28)
> #else
> -0: pdtlb %r0(%r28)
> - ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> + pdtlb %r0(%r28)
> #endif
>
> #ifdef CONFIG_64BIT
> @@ -781,8 +778,7 @@ ENTRY_CFI(flush_dcache_page_asm)
> #ifdef CONFIG_PA20
> pdtlb,l %r0(%r28)
> #else
> -0: pdtlb %r0(%r28)
> - ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> + pdtlb %r0(%r28)
> #endif
>
> 88: ldil L%dcache_stride, %r1
> @@ -840,8 +836,7 @@ ENTRY_CFI(purge_dcache_page_asm)
> #ifdef CONFIG_PA20
> pdtlb,l %r0(%r28)
> #else
> -0: pdtlb %r0(%r28)
> - ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> + pdtlb %r0(%r28)
> #endif
>
> 88: ldil L%dcache_stride, %r1
> @@ -904,10 +899,8 @@ ENTRY_CFI(flush_icache_page_asm)
> 1: pitlb,l %r0(%sr4,%r28)
> ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
> #else
> -0: pdtlb %r0(%r28)
> + pdtlb %r0(%r28)
> 1: pitlb %r0(%sr4,%r28)
> - ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> - ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
> ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
> #endif
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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