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From: Jason Gunthorpe <jgg@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel@lists.infradead.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>, Eric Auger <eric.auger@redhat.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Moritz Fischer <mdf@kernel.org>,
	Michael Shavit <mshavit@google.com>,
	patches@lists.linux.dev,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v7 04/14] iommu/arm-smmu-v3: Make changing domains be hitless for ATS
Date: Fri, 24 May 2024 12:46:32 -0300	[thread overview]
Message-ID: <20240524154632.GD133219@nvidia.com> (raw)
In-Reply-To: <Zj/pmRvkKYrT/h3L@nvidia.com>

On Sat, May 11, 2024 at 02:56:41PM -0700, Nicolin Chen wrote:
> >  static void arm_smmu_v3_write_ste_test_s2_to_abort(struct kunit *test)
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > index 532fe17f28bfe5..01e970f6ee4363 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> 
> > -static void arm_smmu_disable_ats(struct arm_smmu_master *master,
> > -				 struct arm_smmu_domain *smmu_domain)
> > -{
> > -	if (!master->ats_enabled)
> > -		return;
> > -
> > -	pci_disable_ats(to_pci_dev(master->dev));
> > -	/*
> > -	 * Ensure ATS is disabled at the endpoint before we issue the
> > -	 * ATC invalidation via the SMMU.
> > -	 */
> > -	wmb();
> > -	arm_smmu_atc_inv_master(master);
> > -	atomic_dec(&smmu_domain->nr_ats_masters);
> > -}
> > -
> 
> Maybe we could keep the function for symmetry, since prepare()
> still calls pci_disable_ats() + wmb()?

I removed it mainly because it is not symmetrical. On the disable
side the work enable does is split up between prepare and commit.

> > +/*
> > + * Prepare to attach a domain to a master. If disable_ats is not set this will
> > + * turn on ATS if supported. smmu_domain can be NULL if the domain being
> 
> This function doesn't turn on ATS actually, but commit() does.

Lets write a nicer comment:

/*
 * Start the sequence to attach a domain to a master. The sequence contains three
 * steps:
 *  arm_smmu_attach_prepare()
 *  arm_smmu_install_ste_for_dev()
 *  arm_smmu_attach_commit()
 *
 * If prepare succeeds then the sequence must be completed. The STE installed
 * must set the STE.EATS field according to state.ats_enabled.
 *
 * ATS is automatically enabled if the underlying device supports it.
 * disable_ats can inhibit this to support STEs like bypass that don't allow
 * ATS.
 *
 * The change of the EATS in the STE and the PCI ATS config space is managed by
 * this sequence to be in the right order such that if PCI ATS is enabled then
 * STE.ETAS is enabled.
 *
 * new_domain can be NULL if the domain being attached does not have a page
 * table and does not require invalidation tracking, and does not support ATS.
 */

> Should it be more accurate "If disable_ats is set this will turn
> off ATS if enabled"?

After looking a bit I removed disable_ats. We can now tell that ATS is
not possible because smmu_domain = NULL.

> > + * attached does not have a page table and does not require invalidation
> > + * tracking.
> > + */
> > +static int arm_smmu_attach_prepare(struct arm_smmu_master *master,
> > +				   struct iommu_domain *domain,
> > +				   struct attach_state *state)
> > +{
> > +	struct arm_smmu_domain *smmu_domain =
> > +		to_smmu_domain_devices(domain);
> 
> This could fit into a single line.

Done

> > -static int arm_smmu_attach_dev_ste(struct device *dev,
> > -				   struct arm_smmu_ste *ste)
> > +static int arm_smmu_attach_dev_ste(struct iommu_domain *domain,
> > +				   struct device *dev, struct arm_smmu_ste *ste)
> 
> How about arm_smmu_domain_attach_dev_ste?

It is reflecting the ops name 'iommu_domain_ops attach_dev'

> >  void arm_smmu_make_cdtable_ste(struct arm_smmu_ste *target,
> > -			       struct arm_smmu_master *master);
> > +			       struct arm_smmu_master *master,
> > +			       bool ats_enabled);
> >  void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> >  				 struct arm_smmu_master *master,
> > -				 struct arm_smmu_domain *smmu_domain);
> > +				 struct arm_smmu_domain *smmu_domain,
> > +				 bool ats_enabled);
> 
> We seem to pass state.want_ats all the time. So maybe just name
> it "bool want_ats", given that "ats_enabled" is only true after
> commit() that always comes after these two functions?

Lets rename want_ats to ats_enabled to have a consistent name.

Jason

  reply	other threads:[~2024-05-24 15:46 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-08 18:57 [PATCH v7 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 01/14] iommu/arm-smmu-v3: Convert to domain_alloc_sva() Jason Gunthorpe
2024-05-09 18:21   ` Nicolin Chen
2024-05-09 18:40     ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 02/14] iommu/arm-smmu-v3: Start building a generic PASID layer Jason Gunthorpe
2024-05-11  2:32   ` Nicolin Chen
2024-05-12 13:12     ` Jason Gunthorpe
2024-05-12 20:54       ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 03/14] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2024-05-11  3:12   ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 04/14] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2024-05-11 21:56   ` Nicolin Chen
2024-05-24 15:46     ` Jason Gunthorpe [this message]
2024-05-08 18:57 ` [PATCH v7 05/14] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2024-05-12  9:03   ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 06/14] iommu/arm-smmu-v3: Do not use master->sva_enable to restrict attaches Jason Gunthorpe
2024-05-13  6:01   ` Nicolin Chen
2024-05-13 20:58     ` Nicolin Chen
2024-05-14 22:51     ` Jason Gunthorpe
2024-05-15  0:36   ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 07/14] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2024-05-13  6:32   ` Nicolin Chen
2024-05-13 22:28     ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 08/14] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2024-05-13  6:36   ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 09/14] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2024-05-13  6:41   ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 10/14] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2024-05-13 21:23   ` Nicolin Chen
2024-05-17 19:48     ` Jason Gunthorpe
2024-05-17 20:34       ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 11/14] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2024-05-13  7:11   ` Nicolin Chen
2024-05-14 23:02     ` Jason Gunthorpe
2024-05-15  0:32       ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 12/14] iommu/arm-smmu-v3: Test the STE S1DSS functionality Jason Gunthorpe
2024-05-13 21:34   ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 13/14] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2024-05-13  8:31   ` Nicolin Chen
2024-05-21 17:51     ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 14/14] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
2024-05-13  8:34   ` Nicolin Chen
2024-05-09  9:39 ` [PATCH v7 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Nicolin Chen

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