From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <iommu@lists.linux.dev>, Joerg Roedel <joro@8bytes.org>,
<linux-arm-kernel@lists.infradead.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Eric Auger <eric.auger@redhat.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Moritz Fischer <mdf@kernel.org>,
Michael Shavit <mshavit@google.com>, <patches@lists.linux.dev>,
Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v7 10/14] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain
Date: Mon, 13 May 2024 14:23:18 -0700 [thread overview]
Message-ID: <ZkKExvnPkHWjedAX@nvidia.com> (raw)
In-Reply-To: <10-v7-9597c885796c+d2-smmuv3_newapi_p2b_jgg@nvidia.com>
On Wed, May 08, 2024 at 03:57:18PM -0300, Jason Gunthorpe wrote:
> This removes all the notifier de-duplication logic in the driver and
> relies on the core code to de-duplicate and allocate only one SVA domain
> per mm per smmu instance. This naturally gives a 1:1 relationship between
> SVA domain and mmu notifier.
>
> It is a significant simplication of the flow, as we end up with a single
> struct arm_smmu_domain for each MM and the invalidation can then be
> shifted to properly use the masters list like S1/S2 do.
>
> Remove all of the previous mmu_notifier, bond, shared cd, and cd refcount
> logic entirely.
>
> The logic here is tightly wound together with the unusued BTM
> support. Since the BTM logic requires holding all the iommu_domains in a
> global ASID xarray it conflicts with the design to have a single SVA
> domain per PASID, as multiple SMMU instances will need to have different
> domains.
>
> Following patches resolve this by making the ASID xarray per-instance
> instead of global. However, converting the BTM code over to this
> methodology requires many changes.
>
> Thus, since ARM_SMMU_FEAT_BTM is never enabled, remove the parts of the
> BTM support for ASID sharing that interact with SVA as well.
>
> A followup series is already working on fully enabling the BTM support,
> that requires iommufd's VIOMMU feature to bring in the KVM's VMID as
> well. It will come with an already written patch to bring back the ASID
> sharing using a per-instance ASID xarray.
>
> https://lore.kernel.org/linux-iommu/20240208151837.35068-1-shameerali.kolothum.thodi@huawei.com/
> https://lore.kernel.org/linux-iommu/26-v6-228e7adf25eb+4155-smmuv3_newapi_p2_jgg@nvidia.com/
>
> Tested-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
> static void arm_smmu_mmu_notifier_free(struct mmu_notifier *mn)
> {
> - kfree(mn_to_smmu(mn));
> + struct arm_smmu_domain *smmu_domain =
> + container_of(mn, struct arm_smmu_domain, mmu_notifier);
> +
> + kfree(smmu_domain);
Would it be cleaner to refactor mn_to_smmu to mn_to_smmu_domain?
Otherwise, would it feel simpler by just
kfree(container_of(mn, struct arm_smmu_domain, mmu_notifier));
Thanks
Nicolin
next prev parent reply other threads:[~2024-05-13 21:23 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-08 18:57 [PATCH v7 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 01/14] iommu/arm-smmu-v3: Convert to domain_alloc_sva() Jason Gunthorpe
2024-05-09 18:21 ` Nicolin Chen
2024-05-09 18:40 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 02/14] iommu/arm-smmu-v3: Start building a generic PASID layer Jason Gunthorpe
2024-05-11 2:32 ` Nicolin Chen
2024-05-12 13:12 ` Jason Gunthorpe
2024-05-12 20:54 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 03/14] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2024-05-11 3:12 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 04/14] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2024-05-11 21:56 ` Nicolin Chen
2024-05-24 15:46 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 05/14] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2024-05-12 9:03 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 06/14] iommu/arm-smmu-v3: Do not use master->sva_enable to restrict attaches Jason Gunthorpe
2024-05-13 6:01 ` Nicolin Chen
2024-05-13 20:58 ` Nicolin Chen
2024-05-14 22:51 ` Jason Gunthorpe
2024-05-15 0:36 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 07/14] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2024-05-13 6:32 ` Nicolin Chen
2024-05-13 22:28 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 08/14] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2024-05-13 6:36 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 09/14] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2024-05-13 6:41 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 10/14] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2024-05-13 21:23 ` Nicolin Chen [this message]
2024-05-17 19:48 ` Jason Gunthorpe
2024-05-17 20:34 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 11/14] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2024-05-13 7:11 ` Nicolin Chen
2024-05-14 23:02 ` Jason Gunthorpe
2024-05-15 0:32 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 12/14] iommu/arm-smmu-v3: Test the STE S1DSS functionality Jason Gunthorpe
2024-05-13 21:34 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 13/14] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2024-05-13 8:31 ` Nicolin Chen
2024-05-21 17:51 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 14/14] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
2024-05-13 8:34 ` Nicolin Chen
2024-05-09 9:39 ` [PATCH v7 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Nicolin Chen
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