From: Eric Auger <eric.auger@redhat.com>
To: Nicolin Chen <nicolinc@nvidia.com>,
will@kernel.org, robin.murphy@arm.com, jgg@nvidia.com,
kevin.tian@intel.com, tglx@linutronix.de, maz@kernel.org,
alex.williamson@redhat.com
Cc: joro@8bytes.org, shuah@kernel.org, reinette.chatre@intel.com,
yebin10@huawei.com, apatel@ventanamicro.com,
shivamurthy.shastri@linutronix.de, bhelgaas@google.com,
anna-maria@linutronix.de, yury.norov@gmail.com,
nipun.gupta@amd.com, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
linux-kselftest@vger.kernel.org, patches@lists.linux.dev,
jean-philippe@linaro.org, mdf@kernel.org, mshavit@google.com,
shameerali.kolothum.thodi@huawei.com, smostafa@google.com,
ddutile@redhat.com
Subject: Re: [PATCH RFCv2 02/13] genirq/msi: Rename iommu_dma_compose_msi_msg() to msi_msg_set_msi_addr()
Date: Thu, 23 Jan 2025 18:10:54 +0100 [thread overview]
Message-ID: <fa9b443d-e068-41bc-ad03-9f04818c72e0@redhat.com> (raw)
In-Reply-To: <242034456c0bfcd7ecf75cb29d8e5c99db0675d6.1736550979.git.nicolinc@nvidia.com>
On 1/11/25 4:32 AM, Nicolin Chen wrote:
> From: Jason Gunthorpe <jgg@nvidia.com>
>
> The new function is used to take in a u64 MSI address and store it in the
> msi_msg. If the iommu has provided an alternative address then that is
> replaced instead.
>
> All callers have a tidy u64 already so this also consolidates the repeated
> low/high code into a small helper.
>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
> ---
> include/linux/msi.h | 18 ++++++++----------
> drivers/irqchip/irq-gic-v2m.c | 5 +----
> drivers/irqchip/irq-gic-v3-its.c | 13 +++----------
> drivers/irqchip/irq-gic-v3-mbi.c | 12 ++++--------
> drivers/irqchip/irq-ls-scfg-msi.c | 5 ++---
> 5 files changed, 18 insertions(+), 35 deletions(-)
>
> diff --git a/include/linux/msi.h b/include/linux/msi.h
> index d442b4a69d56..f6369748fc6e 100644
> --- a/include/linux/msi.h
> +++ b/include/linux/msi.h
> @@ -296,13 +296,8 @@ static inline void msi_desc_set_iommu_msi_iova(struct msi_desc *desc,
> #endif
> }
>
> -/**
> - * iommu_dma_compose_msi_msg() - Apply translation to an MSI message
> - * @desc: MSI descriptor prepared by iommu_dma_prepare_msi()
> - * @msg: MSI message containing target physical address
> - */
> -static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc,
> - struct msi_msg *msg)
> +static inline void msi_msg_set_msi_addr(struct msi_desc *desc,
> + struct msi_msg *msg, u64 msi_addr)
nit: msi_msg_set_addr(ess) may be enough as the populated fields are
address_lo/hi
> {
> #ifdef CONFIG_IRQ_MSI_IOMMU
> if (desc->iommu_msi_page_shift) {
> @@ -310,11 +305,14 @@ static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc,
> << desc->iommu_msi_page_shift;
>
> msg->address_hi = upper_32_bits(msi_iova);
> - msg->address_lo = lower_32_bits(msi_iova) |
> - (msg->address_lo &
> - ((1 << desc->iommu_msi_page_shift) - 1));
> + msg->address_lo =
> + lower_32_bits(msi_iova) |
> + (msi_addr & ((1 << desc->iommu_msi_page_shift) - 1));
> + return;
> }
> #endif
> + msg->address_hi = upper_32_bits(msi_addr);
> + msg->address_lo = lower_32_bits(msi_addr);
> }
>
> int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid,
> diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
> index be35c5349986..6599c56873ad 100644
> --- a/drivers/irqchip/irq-gic-v2m.c
> +++ b/drivers/irqchip/irq-gic-v2m.c
> @@ -87,9 +87,6 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
> struct v2m_data *v2m = irq_data_get_irq_chip_data(data);
> phys_addr_t addr = gicv2m_get_msi_addr(v2m, data->hwirq);
>
> - msg->address_hi = upper_32_bits(addr);
> - msg->address_lo = lower_32_bits(addr);
> -
> if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY)
> msg->data = 0;
> else
> @@ -97,7 +94,7 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
> if (v2m->flags & GICV2M_NEEDS_SPI_OFFSET)
> msg->data -= v2m->spi_offset;
>
> - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg);
> + msi_msg_set_msi_addr(irq_data_get_msi_desc(data), msg, addr);
> }
>
> static struct irq_chip gicv2m_irq_chip = {
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 92244cfa0464..8c3ab7b471ca 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -1809,17 +1809,10 @@ static u64 its_irq_get_msi_base(struct its_device *its_dev)
> static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg)
> {
> struct its_device *its_dev = irq_data_get_irq_chip_data(d);
> - struct its_node *its;
> - u64 addr;
> -
> - its = its_dev->its;
> - addr = its->get_msi_base(its_dev);
> -
> - msg->address_lo = lower_32_bits(addr);
> - msg->address_hi = upper_32_bits(addr);
> - msg->data = its_get_event_id(d);
>
> - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg);
> + msg->data = its_get_event_id(d);
> + msi_msg_set_msi_addr(irq_data_get_msi_desc(d), msg,
> + its_dev->its->get_msi_base(its_dev));
> }
>
> static int its_irq_set_irqchip_state(struct irq_data *d,
> diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c
> index 3fe870f8ee17..513479da9ee3 100644
> --- a/drivers/irqchip/irq-gic-v3-mbi.c
> +++ b/drivers/irqchip/irq-gic-v3-mbi.c
> @@ -147,22 +147,18 @@ static const struct irq_domain_ops mbi_domain_ops = {
>
> static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
> {
> - msg[0].address_hi = upper_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
> - msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
> msg[0].data = data->parent_data->hwirq;
> -
> - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg);
> + msi_msg_set_msi_addr(irq_data_get_msi_desc(data), &msg[0],
> + mbi_phys_base + GICD_SETSPI_NSR);
> }
>
> static void mbi_compose_mbi_msg(struct irq_data *data, struct msi_msg *msg)
> {
> mbi_compose_msi_msg(data, msg);
>
> - msg[1].address_hi = upper_32_bits(mbi_phys_base + GICD_CLRSPI_NSR);
> - msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR);
> msg[1].data = data->parent_data->hwirq;
> -
> - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), &msg[1]);
> + msi_msg_set_msi_addr(irq_data_get_msi_desc(data), &msg[1],
> + mbi_phys_base + GICD_CLRSPI_NSR);
> }
>
> static bool mbi_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
> diff --git a/drivers/irqchip/irq-ls-scfg-msi.c b/drivers/irqchip/irq-ls-scfg-msi.c
> index c0e1aafe468c..2ac6d89b4cb4 100644
> --- a/drivers/irqchip/irq-ls-scfg-msi.c
> +++ b/drivers/irqchip/irq-ls-scfg-msi.c
> @@ -87,8 +87,6 @@ static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
> {
> struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(data);
>
> - msg->address_hi = upper_32_bits(msi_data->msiir_addr);
> - msg->address_lo = lower_32_bits(msi_data->msiir_addr);
> msg->data = data->hwirq;
>
> if (msi_affinity_flag) {
> @@ -98,7 +96,8 @@ static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
> msg->data |= cpumask_first(mask);
> }
>
> - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg);
> + msi_msg_set_msi_addr(irq_data_get_msi_desc(data), msg,
> + msi_data->msiir_addr);
> }
>
> static int ls_scfg_msi_set_affinity(struct irq_data *irq_data,
next prev parent reply other threads:[~2025-01-23 17:11 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-11 3:32 [PATCH RFCv2 00/13] iommu: Add MSI mapping support with nested SMMU Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 01/13] genirq/msi: Store the IOMMU IOVA directly in msi_desc instead of iommu_cookie Nicolin Chen
2025-01-23 17:10 ` Eric Auger
2025-01-23 18:48 ` Jason Gunthorpe
2025-01-29 12:11 ` Eric Auger
2025-01-11 3:32 ` [PATCH RFCv2 02/13] genirq/msi: Rename iommu_dma_compose_msi_msg() to msi_msg_set_msi_addr() Nicolin Chen
2025-01-23 17:10 ` Eric Auger [this message]
2025-01-23 18:50 ` Jason Gunthorpe
2025-01-29 10:44 ` Eric Auger
2025-01-11 3:32 ` [PATCH RFCv2 03/13] iommu: Make iommu_dma_prepare_msi() into a generic operation Nicolin Chen
2025-01-23 17:10 ` Eric Auger
2025-01-23 18:16 ` Jason Gunthorpe
2025-01-29 12:29 ` Eric Auger
2025-01-11 3:32 ` [PATCH RFCv2 04/13] irqchip: Have CONFIG_IRQ_MSI_IOMMU be selected by the irqchips that need it Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 05/13] iommu: Turn fault_data to iommufd private pointer Nicolin Chen
2025-01-23 9:54 ` Tian, Kevin
2025-01-23 13:25 ` Jason Gunthorpe
2025-01-29 12:40 ` Eric Auger
2025-02-03 17:48 ` Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 06/13] iommufd: Make attach_handle generic Nicolin Chen
2025-01-18 8:23 ` Yi Liu
2025-01-18 20:32 ` Nicolin Chen
2025-01-19 10:40 ` Yi Liu
2025-01-20 5:54 ` Nicolin Chen
2025-01-24 13:31 ` Yi Liu
2025-01-20 14:20 ` Jason Gunthorpe
2025-01-29 13:14 ` Eric Auger
2025-02-03 18:08 ` Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 07/13] iommufd: Implement sw_msi support natively Nicolin Chen
2025-01-15 4:21 ` Yury Norov
2025-01-16 20:21 ` Jason Gunthorpe
2025-01-23 19:30 ` Jason Gunthorpe
2025-01-11 3:32 ` [PATCH RFCv2 08/13] iommu: Turn iova_cookie to dma-iommu private pointer Nicolin Chen
2025-01-13 16:40 ` Jason Gunthorpe
2025-01-11 3:32 ` [PATCH RFCv2 09/13] iommufd: Add IOMMU_OPTION_SW_MSI_START/SIZE ioctls Nicolin Chen
2025-01-23 10:07 ` Tian, Kevin
2025-02-03 18:36 ` Nicolin Chen
2025-01-29 13:44 ` Eric Auger
2025-01-29 14:58 ` Jason Gunthorpe
2025-01-29 17:23 ` Eric Auger
2025-01-29 17:39 ` Jason Gunthorpe
2025-01-29 17:49 ` Eric Auger
2025-01-29 20:15 ` Jason Gunthorpe
2025-02-07 4:26 ` Nicolin Chen
2025-02-07 14:30 ` Jason Gunthorpe
2025-02-07 15:28 ` Jason Gunthorpe
2025-02-07 18:59 ` Nicolin Chen
2025-02-09 18:09 ` Jason Gunthorpe
2025-01-11 3:32 ` [PATCH RFCv2 10/13] iommufd/selftes: Add coverage for IOMMU_OPTION_SW_MSI_START/SIZE Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 11/13] iommufd/device: Allow setting IOVAs for MSI(x) vectors Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 12/13] vfio-iommufd: Provide another layer of msi_iova helpers Nicolin Chen
2025-01-11 3:32 ` [PATCH RFCv2 13/13] vfio/pci: Allow preset MSI IOVAs via VFIO_IRQ_SET_ACTION_PREPARE Nicolin Chen
2025-01-23 9:06 ` [PATCH RFCv2 00/13] iommu: Add MSI mapping support with nested SMMU Shameerali Kolothum Thodi
2025-01-23 13:24 ` Jason Gunthorpe
2025-01-29 14:54 ` Eric Auger
2025-01-29 15:04 ` Jason Gunthorpe
2025-01-29 17:46 ` Eric Auger
2025-01-29 20:13 ` Jason Gunthorpe
2025-02-04 12:55 ` Eric Auger
2025-02-04 13:02 ` Jason Gunthorpe
2025-02-05 22:49 ` Jacob Pan
2025-02-05 22:56 ` Nicolin Chen
2025-02-07 14:34 ` Jason Gunthorpe
2025-02-07 14:42 ` Thomas Gleixner
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