From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org,
abel.vesa@linaro.org, manivannan.sadhasivam@linaro.org,
lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
andersson@kernel.org, konradybcio@kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-pci@vger.kernel.org, quic_qianyu@quicinc.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v4 2/5] dt-bindings: PCI: qcom: Document the QCS615 PCIe Controller
Date: Mon, 12 May 2025 11:26:10 +0200 [thread overview]
Message-ID: <02819d6c-a030-4987-bfcf-1d1a60ec3f00@kernel.org> (raw)
In-Reply-To: <e434124b-6975-4027-bb0d-3840fbd25a15@quicinc.com>
On 12/05/2025 10:16, Ziyue Zhang wrote:
>
> On 5/7/2025 1:17 PM, Krzysztof Kozlowski wrote:
>> On Wed, May 07, 2025 at 11:15:56AM GMT, Ziyue Zhang wrote:
>>> From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>>>
>>> Add dedicated schema for the PCIe controllers found on QCS615.
>>> Due to qcs615's clock-names do not match any of the existing
>>> dt-bindings, a new compatible for qcs615 is needed.
>> Other bindings for QCS615 were not finished, so I have doubts this is
>> done as well. Send your bindings once you finish them.
>>
>> ...
>>
>>> +properties:
>>> + compatible:
>>> + const: qcom,qcs615-pcie
>>> +
>>> + reg:
>>> + minItems: 6
>>> + maxItems: 6
>>> +
>>> + reg-names:
>>> + items:
>>> + - const: parf # Qualcomm specific registers
>>> + - const: dbi # DesignWare PCIe registers
>>> + - const: elbi # External local bus interface registers
>>> + - const: atu # ATU address space
>>> + - const: config # PCIe configuration space
>>> + - const: mhi # MHI registers
>>> +
>>> + clocks:
>>> + minItems: 5
>> Drop or use correct value - 6. I don't understand why this changed and
>> nothing in changelog explains this.
>>
>> Best regards,
>> Krzysztof
>
> Hi Krzysztof
>
> As discussed in qcs8300, gcc_aux_clk is recommended to be removed from PCIe PHY
> device tree node, so I need to update the bindings.
I don't see how this is relevant to the code you posted and to my
comment, so comment stays valid.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-05-12 9:26 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-07 3:15 [PATCH v4 0/5] pci: qcom: Add QCS615 PCIe support Ziyue Zhang
2025-05-07 3:15 ` [PATCH v4 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615 Ziyue Zhang
2025-05-07 5:12 ` Krzysztof Kozlowski
2025-05-07 3:15 ` [PATCH v4 2/5] dt-bindings: PCI: qcom: Document the QCS615 PCIe Controller Ziyue Zhang
2025-05-07 5:17 ` Krzysztof Kozlowski
2025-05-12 8:16 ` Ziyue Zhang
2025-05-12 9:26 ` Krzysztof Kozlowski [this message]
2025-05-07 3:15 ` [PATCH v4 3/5] arm64: dts: qcom: qcs615: enable pcie Ziyue Zhang
2025-05-08 14:47 ` Konrad Dybcio
2025-05-07 3:15 ` [PATCH v4 4/5] arm64: dts: qcom: qcs615-ride: Enable PCIe interface Ziyue Zhang
2025-05-07 3:15 ` [PATCH v4 5/5] PCI: qcom: Add support for QCS615 SoC Ziyue Zhang
2025-05-07 5:18 ` Krzysztof Kozlowski
2025-05-12 9:03 ` Ziyue Zhang
2025-05-07 15:41 ` [PATCH v4 0/5] pci: qcom: Add QCS615 PCIe support Rob Herring (Arm)
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