Re: [PATCH v4 2/5] dt-bindings: PCI: qcom: Document the QCS615 PCIe Controller

[Ziyue Zhang <quic_ziyuzhan@quicinc.com>]

On 5/7/2025 1:17 PM, Krzysztof Kozlowski wrote:
> On Wed, May 07, 2025 at 11:15:56AM GMT, Ziyue Zhang wrote:
>> From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>>
>> Add dedicated schema for the PCIe controllers found on QCS615.
>> Due to qcs615's clock-names do not match any of the existing
>> dt-bindings, a new compatible for qcs615 is needed.
> Other bindings for QCS615 were not finished, so I have doubts this is
> done as well. Send your bindings once you finish them.
>
> ...
>
>> +properties:
>> +  compatible:
>> +    const: qcom,qcs615-pcie
>> +
>> +  reg:
>> +    minItems: 6
>> +    maxItems: 6
>> +
>> +  reg-names:
>> +    items:
>> +      - const: parf # Qualcomm specific registers
>> +      - const: dbi # DesignWare PCIe registers
>> +      - const: elbi # External local bus interface registers
>> +      - const: atu # ATU address space
>> +      - const: config # PCIe configuration space
>> +      - const: mhi # MHI registers
>> +
>> +  clocks:
>> +    minItems: 5
> Drop or use correct value - 6. I don't understand why this changed and
> nothing in changelog explains this.
>
> Best regards,
> Krzysztof

Hi Krzysztof

As discussed in qcs8300, gcc_aux_clk is recommended to be removed from PCIe PHY
device tree node, so I need to update the bindings.

BRs
Ziyue