Linux PCI subsystem development
 help / color / mirror / Atom feed
From: Huang Rui <ray.huang@amd.com>
To: Felipe Balbi <balbi@ti.com>,
	Alan Stern <stern@rowland.harvard.edu>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Paul Zimmerman <Paul.Zimmerman@synopsys.com>,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	Jason Chang <jason.chang@amd.com>,
	"Vincent Wan" <vincent.wan@amd.com>, Tony Li <tony.li@amd.com>,
	<linux-usb@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, Huang Rui <ray.huang@amd.com>
Subject: [PATCH v3 07/19] usb: dwc3: add P3 in U2 SS inactive quirk
Date: Tue, 28 Oct 2014 19:54:28 +0800	[thread overview]
Message-ID: <1414497280-3126-8-git-send-email-ray.huang@amd.com> (raw)
In-Reply-To: <1414497280-3126-1-git-send-email-ray.huang@amd.com>

This patch adds P3 in U2 SS inactive quirk, and some special platforms can
configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/usb/dwc3/core.c          | 23 +++++++++++++++++++++++
 drivers/usb/dwc3/core.h          |  3 +++
 drivers/usb/dwc3/platform_data.h |  1 +
 3 files changed, 27 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 6abf4e9..ccc54df 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -365,6 +365,24 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
 }
 
 /**
+ * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
+ * @dwc: Pointer to our controller context structure
+ */
+static void dwc3_phy_setup(struct dwc3 *dwc)
+{
+	u32 reg;
+
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+
+	if (dwc->u2ss_inp3_quirk)
+		reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
+
+	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+
+	mdelay(100);
+}
+
+/**
  * dwc3_core_init - Low-level initialization of DWC3 Core
  * @dwc: Pointer to our controller context structure
  *
@@ -484,6 +502,8 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
 	dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 
+	dwc3_phy_setup(dwc);
+
 	ret = dwc3_alloc_scratch_buffers(dwc);
 	if (ret)
 		goto err1;
@@ -729,6 +749,8 @@ static int dwc3_probe(struct platform_device *pdev)
 				"snps,disable_scramble_quirk");
 		dwc->u2exit_lfps_quirk = of_property_read_bool(node,
 				"snps,u2exit_lfps_quirk");
+		dwc->u2ss_inp3_quirk = of_property_read_bool(node,
+				"snps,u2ss_inp3_quirk");
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
 		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -740,6 +762,7 @@ static int dwc3_probe(struct platform_device *pdev)
 
 		dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
 		dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk;
+		dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
 	}
 
 	/* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 03e0505..f230668 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -176,6 +176,7 @@
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB3PIPECTL_U2SSINP3OK	(1 << 29)
 #define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
 
 /* Global TX Fifo Size Register */
@@ -681,6 +682,7 @@ struct dwc3_scratchpad_array {
  * @three_stage_setup: set if we perform a three phase setup
  * @disable_scramble_quirk: set if we enable the disable scramble quirk
  * @u2exit_lfps_quirk: set if we enable u2exit lfps quirk
+ * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  */
 struct dwc3 {
 	struct usb_ctrlrequest	*ctrl_req;
@@ -790,6 +792,7 @@ struct dwc3 {
 
 	unsigned		disable_scramble_quirk:1;
 	unsigned		u2exit_lfps_quirk:1;
+	unsigned		u2ss_inp3_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 4e91e09..b5906a3 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -29,4 +29,5 @@ struct dwc3_platform_data {
 	unsigned has_lpm_erratum:1;
 	unsigned lpm_nyet_thres:4;
 	unsigned u2exit_lfps_quirk:1;
+	unsigned u2ss_inp3_quirk:1;
 };
-- 
1.9.1


  parent reply	other threads:[~2014-10-28 11:56 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-28 11:54 [PATCH v3 00/19] usb: dwc3: add support for AMD Nolan SoC Huang Rui
2014-10-28 11:54 ` [PATCH v3 01/19] usb: dwc3: enable hibernation if to be supported Huang Rui
2014-10-28 18:47   ` Paul Zimmerman
2014-10-28 18:50     ` Felipe Balbi
2014-10-28 18:55       ` Paul Zimmerman
2014-10-28 19:01         ` Felipe Balbi
2014-10-28 19:15           ` Paul Zimmerman
2014-10-28 19:18             ` Felipe Balbi
2014-10-29  6:53               ` Huang Rui
2014-10-28 11:54 ` [PATCH v3 02/19] usb: dwc3: add a flag to check if it is fpga board Huang Rui
2014-10-28 11:54 ` [PATCH v3 03/19] usb: dwc3: initialize platform data at pci glue layer Huang Rui
2014-10-28 11:54 ` [PATCH v3 04/19] usb: dwc3: add disscramble quirk Huang Rui
2014-10-28 16:39   ` Bjorn Helgaas
2014-10-28 18:42     ` Felipe Balbi
2014-10-29  6:50     ` Huang Rui
2014-10-28 11:54 ` [PATCH v3 05/19] usb: dwc3: add lpm erratum support Huang Rui
2014-10-28 16:30   ` Bjorn Helgaas
2014-10-29  7:44     ` Huang Rui
2014-10-28 11:54 ` [PATCH v3 06/19] usb: dwc3: add u2exit lfps quirk Huang Rui
2014-10-28 11:54 ` Huang Rui [this message]
2014-10-28 11:54 ` [PATCH v3 08/19] usb: dwc3: add request p1p2p3 quirk Huang Rui
2014-10-28 11:54 ` [PATCH v3 09/19] usb: dwc3: add delay " Huang Rui
2014-10-28 11:54 ` [PATCH v3 10/19] usb: dwc3: add delay phy power change quirk Huang Rui
2014-10-28 11:54 ` [PATCH v3 11/19] usb: dwc3: add lfps filter quirk Huang Rui
2014-10-28 11:54 ` [PATCH v3 12/19] usb: dwc3: add rx_detect to polling lfps quirk Huang Rui
2014-10-28 11:54 ` [PATCH v3 13/19] usb: dwc3: add tx demphasis quirk Huang Rui
2014-10-28 16:27   ` Bjorn Helgaas
2014-10-28 18:43     ` Felipe Balbi
2014-10-29  8:08       ` Huang Rui
2014-10-28 11:54 ` [PATCH v3 14/19] usb: dwc3: set SUSPHY bit for all cores Huang Rui
2014-10-28 11:54 ` [PATCH v3 15/19] usb: dwc3: add disable usb3 suspend phy quirk Huang Rui
2014-10-28 11:54 ` [PATCH v3 16/19] usb: dwc3: add disable usb2 " Huang Rui
2014-10-28 11:54 ` [PATCH v3 17/19] PCI: Add support for AMD Nolan USB3 DRD Huang Rui
2014-10-28 13:30   ` Bjorn Helgaas
2014-10-28 11:54 ` [PATCH v3 18/19] PCI: Add quirk to prevent AMD NL USB3 DRD to bind with xHCI driver Huang Rui
2014-10-28 12:06   ` Sergei Shtylyov
2014-10-28 12:15     ` Huang Rui
2014-10-28 13:29   ` Bjorn Helgaas
2014-10-28 11:54 ` [PATCH v3 19/19] usb: dwc3: add support for AMD NL platform Huang Rui
2014-10-28 13:38   ` Felipe Balbi
2014-10-28 14:35     ` Huang Rui
2014-10-29  9:13       ` Huang Rui
2014-10-29 14:11         ` Felipe Balbi
2014-10-29 14:33           ` Huang Rui
2014-10-29 14:48             ` Felipe Balbi
2014-10-28 14:41 ` [PATCH v3 00/19] usb: dwc3: add support for AMD Nolan SoC Felipe Balbi
2014-10-28 15:17   ` Huang Rui
2014-10-28 15:23     ` Felipe Balbi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1414497280-3126-8-git-send-email-ray.huang@amd.com \
    --to=ray.huang@amd.com \
    --cc=Paul.Zimmerman@synopsys.com \
    --cc=balbi@ti.com \
    --cc=bhelgaas@google.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=heikki.krogerus@linux.intel.com \
    --cc=jason.chang@amd.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-usb@vger.kernel.org \
    --cc=stern@rowland.harvard.edu \
    --cc=tony.li@amd.com \
    --cc=vincent.wan@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox