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* [RFC] PCI: dwc: designware: allow customize unroll registers' readl/writel
@ 2017-07-13 10:48 Jisheng Zhang
  2017-07-13 10:52 ` Jisheng Zhang
  0 siblings, 1 reply; 3+ messages in thread
From: Jisheng Zhang @ 2017-07-13 10:48 UTC (permalink / raw)
  To: Joao Pinto, Jingoo Han, Bjorn Helgaas, linux-pci,
	linux-arm-kernel

Hi Joao, Jingoo,

Now, the PCIE_GET_ATU_OUTB_UNR_REG_OFFSET macro is defined as:

/* Register address builder */
#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region)        \
                        ((0x3 << 20) | ((region) << 9))

I have one question: where does the (0x3 << 20) come from? 2MB space, a bit
large. And I didn't find it in the databook. Is it platform specific?
If yes, I want to cook one patch to customize unroll registers' readl/writel.

And how does (0x3 << 20) enable DBI2 access?

Thanks in advance,
Jisheng

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [RFC] PCI: dwc: designware: allow customize unroll registers' readl/writel
  2017-07-13 10:48 [RFC] PCI: dwc: designware: allow customize unroll registers' readl/writel Jisheng Zhang
@ 2017-07-13 10:52 ` Jisheng Zhang
  2017-07-17  8:59   ` Joao Pinto
  0 siblings, 1 reply; 3+ messages in thread
From: Jisheng Zhang @ 2017-07-13 10:52 UTC (permalink / raw)
  To: Joao Pinto, Jingoo Han, Bjorn Helgaas; +Cc: linux-pci, linux-arm-kernel

On Thu, 13 Jul 2017 18:48:37 +0800 Jisheng Zhang wrote:

> Hi Joao, Jingoo,
> 
> Now, the PCIE_GET_ATU_OUTB_UNR_REG_OFFSET macro is defined as:
> 
> /* Register address builder */
> #define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region)        \
>                         ((0x3 << 20) | ((region) << 9))
> 
> I have one question: where does the (0x3 << 20) come from? 2MB space, a bit

sorry, typo. (0x3 << 20) should be 3MB.

> large. And I didn't find it in the databook. Is it platform specific?
> If yes, I want to cook one patch to customize unroll registers' readl/writel.
> 
> And how does (0x3 << 20) enable DBI2 access?
> 
> Thanks in advance,
> Jisheng


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [RFC] PCI: dwc: designware: allow customize unroll registers' readl/writel
  2017-07-13 10:52 ` Jisheng Zhang
@ 2017-07-17  8:59   ` Joao Pinto
  0 siblings, 0 replies; 3+ messages in thread
From: Joao Pinto @ 2017-07-17  8:59 UTC (permalink / raw)
  To: Jisheng Zhang, Joao Pinto, Jingoo Han, Bjorn Helgaas
  Cc: linux-pci, linux-arm-kernel

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^ permalink raw reply	[flat|nested] 3+ messages in thread
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2017-07-13 10:48 [RFC] PCI: dwc: designware: allow customize unroll registers' readl/writel Jisheng Zhang
2017-07-13 10:52 ` Jisheng Zhang
2017-07-17  8:59   ` Joao Pinto

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