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* [PATCH] lspci: Reorder Express Root Complex registers to Cap, Ctl, Sta
@ 2019-05-17 18:40 Bjorn Helgaas
  2020-01-21 20:48 ` Martin Mareš
  0 siblings, 1 reply; 2+ messages in thread
From: Bjorn Helgaas @ 2019-05-17 18:40 UTC (permalink / raw)
  To: Martin Mares; +Cc: linux-pci, Bjorn Helgaas

From: Bjorn Helgaas <bhelgaas@google.com>

Registers in the PCI Express Capability come in sets of three (Capability,
Control, Status), and we typically print them in that order.  The Root
Complex-related registers were an exception: we printed them in the
(Control, Capability, Status) order.

Decode the RootCap, RootCtl, and RootSta registers in the usual order.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 ls-caps.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/ls-caps.c b/ls-caps.c
index a739f46..f1f325d 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -897,7 +897,13 @@ static void cap_express_slot(struct device *d, int where)
 
 static void cap_express_root(struct device *d, int where)
 {
-  u32 w = get_conf_word(d, where + PCI_EXP_RTCTL);
+  u32 w;
+
+  w = get_conf_word(d, where + PCI_EXP_RTCAP);
+  printf("\t\tRootCap: CRSVisible%c\n",
+	FLAG(w, PCI_EXP_RTCAP_CRSVIS));
+
+  w = get_conf_word(d, where + PCI_EXP_RTCTL);
   printf("\t\tRootCtl: ErrCorrectable%c ErrNon-Fatal%c ErrFatal%c PMEIntEna%c CRSVisible%c\n",
 	FLAG(w, PCI_EXP_RTCTL_SECEE),
 	FLAG(w, PCI_EXP_RTCTL_SENFEE),
@@ -905,10 +911,6 @@ static void cap_express_root(struct device *d, int where)
 	FLAG(w, PCI_EXP_RTCTL_PMEIE),
 	FLAG(w, PCI_EXP_RTCTL_CRSVIS));
 
-  w = get_conf_word(d, where + PCI_EXP_RTCAP);
-  printf("\t\tRootCap: CRSVisible%c\n",
-	FLAG(w, PCI_EXP_RTCAP_CRSVIS));
-
   w = get_conf_long(d, where + PCI_EXP_RTSTA);
   printf("\t\tRootSta: PME ReqID %04x, PMEStatus%c PMEPending%c\n",
 	w & PCI_EXP_RTSTA_PME_REQID,
-- 
2.21.0.1020.gf2820cf01a-goog


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2019-05-17 18:40 [PATCH] lspci: Reorder Express Root Complex registers to Cap, Ctl, Sta Bjorn Helgaas
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