Re: [PATCH] PCI: keystone: Fix outbound region mapping

[Yurii Monakov <monakov.y@gmail.com>]

On Tue, 17 Dec 2019 08:31:13 -0600, Bjorn Helgaas <helgaas@kernel.org> wrote:

> [+cc Kishon]
> 
> On Fri, Oct 04, 2019 at 06:48:11PM +0300, Yurii Monakov wrote:
> > PCIe window memory start address should be incremented by OB_WIN_SIZE
> > megabytes (8 MB) instead of plain OB_WIN_SIZE (8).
> > 
> > Signed-off-by: Yurii Monakov <monakov.y@gmail.com>  
> 
> I added:
> 
>   Fixes: e75043ad9792 ("PCI: keystone: Cleanup outbound window configuration")
>   Acked-by: Andrew Murray <andrew.murray@arm.com>
>   Cc: stable@vger.kernel.org      # v4.20+
> 
> and cc'd Kishon (author of  e75043ad9792) and put this on my
> pci/host-keystone branch for v5.6.  Lorenzo may pick this up when he
> returns.
> 
> I'd like the commit message to say what this fixes.  Currently it just
> restates the code change, which I can see from the diff.
This was my first patch sent to LKML, I'm sorry for inconvenience.
Should I take any actions to fix this?

> My *guess* is that previously, we could only access 8MB of MMIO space
> and this patch increases that to 8MB * num_viewport.
Technically you are right. It seems that without this patch all outbound
regions were mapped to first 8 MB. But this is obviously a bug, because
comment above the loop states that the intent was to map num_ob_windows
to linear MMIO space. And prior to e75043ad9792 'start' variable was
incremented by 'tr_size = (1 << 3) * SZ_1M'.

Best Regards,
Yurii Monakov

> > ---
> >  drivers/pci/controller/dwc/pci-keystone.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
> > index af677254a072..f19de60ac991 100644
> > --- a/drivers/pci/controller/dwc/pci-keystone.c
> > +++ b/drivers/pci/controller/dwc/pci-keystone.c
> > @@ -422,7 +422,7 @@ static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie)
> >  				   lower_32_bits(start) | OB_ENABLEN);
> >  		ks_pcie_app_writel(ks_pcie, OB_OFFSET_HI(i),
> >  				   upper_32_bits(start));
> > -		start += OB_WIN_SIZE;
> > +		start += OB_WIN_SIZE * SZ_1M;
> >  	}
> >  
> >  	val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
> > -- 
> > 2.17.1
> >