Linux PCI subsystem development
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From: Bjorn Helgaas <helgaas@kernel.org>
To: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: "Shmuel Hazan" <sh@tkos.co.il>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Marek Behún" <marek.behun@nic.cz>,
	"Baruch Siach" <baruch@tkos.co.il>,
	"Chris ackham" <chris.packham@alliedtelesis.co.nz>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] PCI: mvebu: setup BAR0 to internal-regs
Date: Mon, 22 Jun 2020 17:49:25 -0500	[thread overview]
Message-ID: <20200622224925.GA2332050@bjorn-Precision-5520> (raw)
In-Reply-To: <20200622204033.72055de8@windsurf.home>

On Mon, Jun 22, 2020 at 08:40:33PM +0200, Thomas Petazzoni wrote:
> On Mon, 22 Jun 2020 12:25:16 -0500
> Bjorn Helgaas <helgaas@kernel.org> wrote:
> 
> > > As a result of the requirement above, without this patch, MSI won't
> > > function and therefore some devices won't operate properly without
> > > pci=nomsi.  
> > 
> > Does that mean MSIs never worked at all with mvebu?
> 
> They definitely worked. I think what happens is that this register was
> normally setup by the vendor-specific bootloader, and thanks to
> firmware initialization, Linux had MSIs working properly.
> 
> With other bootloaders that initialize the PCIe block differently, or
> even not at all, it became clear this init was missing in Linux.

That would be very useful information to include in the commit log.

Are there any other similar bugs lurking?  Other registers where we
implicitly rely on the bootloader to do something?

Bjorn

  reply	other threads:[~2020-06-22 22:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-21  5:30 [PATCH] PCI: mvebu: setup BAR0 to internal-regs Shmuel Hazan
2020-06-22 17:25 ` Bjorn Helgaas
2020-06-22 18:40   ` Thomas Petazzoni
2020-06-22 22:49     ` Bjorn Helgaas [this message]
2020-06-23  4:31       ` Shmuel H.

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