* [PATCH v4 0/2] PCI: qcom: fix PCIe support on sm8250 @ 2021-01-13 15:49 Dmitry Baryshkov 2021-01-13 15:49 ` [PATCH v4 1/2] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 Dmitry Baryshkov 2021-01-13 15:49 ` [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock Dmitry Baryshkov 0 siblings, 2 replies; 4+ messages in thread From: Dmitry Baryshkov @ 2021-01-13 15:49 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Rob Herring, Lorenzo Pieralisi Cc: linux-arm-msm, Manivannan Sadhasivam, linux-pci SM8250 platform requires additional clock to be enabled for PCIe to function. In case it is disabled, PCIe access will result in IOMMU timeouts. Add device tree binding and driver support for this clock. Changes since v3: - Merge clock handling back into qcom_pcie_get_resources_2_7_0(). Define res->num_clks to the amount of clocks used for this particular platform. Changes since v2: - Split this clock handling from qcom_pcie_get_resources_2_7_0() - Change comment to point that the clock is required rather than optional Changes since v1: - Added Fixes: tags, as respective patches have hit the upstream Linux tree. ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v4 1/2] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 2021-01-13 15:49 [PATCH v4 0/2] PCI: qcom: fix PCIe support on sm8250 Dmitry Baryshkov @ 2021-01-13 15:49 ` Dmitry Baryshkov 2021-01-13 15:49 ` [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock Dmitry Baryshkov 1 sibling, 0 replies; 4+ messages in thread From: Dmitry Baryshkov @ 2021-01-13 15:49 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Rob Herring, Lorenzo Pieralisi Cc: linux-arm-msm, Manivannan Sadhasivam, linux-pci On SM8250 additional clock is required for PCIe devices to access NOC. Document this requirement in devicetree bindings. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 458168247ccc ("dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC") --- .../devicetree/bindings/pci/qcom,pcie.txt | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 3b55310390a0..0da458a051b6 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -132,8 +132,20 @@ - "master_bus" AXI Master clock - "slave_bus" AXI Slave clock --clock-names: - Usage: required for sdm845 and sm8250 +- clock-names: + Usage: required for sdm845 + Value type: <stringlist> + Definition: Should contain the following entries + - "aux" Auxiliary clock + - "cfg" Configuration clock + - "bus_master" Master AXI clock + - "bus_slave" Slave AXI clock + - "slave_q2a" Slave Q2A clock + - "tbu" PCIe TBU clock + - "pipe" PIPE clock + +- clock-names: + Usage: required for sm8250 Value type: <stringlist> Definition: Should contain the following entries - "aux" Auxiliary clock @@ -142,6 +154,7 @@ - "bus_slave" Slave AXI clock - "slave_q2a" Slave Q2A clock - "tbu" PCIe TBU clock + - "ddrss_sf_tbu" PCIe SF TBU clock - "pipe" PIPE clock - resets: -- 2.29.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock 2021-01-13 15:49 [PATCH v4 0/2] PCI: qcom: fix PCIe support on sm8250 Dmitry Baryshkov 2021-01-13 15:49 ` [PATCH v4 1/2] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 Dmitry Baryshkov @ 2021-01-13 15:49 ` Dmitry Baryshkov 2021-01-16 16:26 ` Manivannan Sadhasivam 1 sibling, 1 reply; 4+ messages in thread From: Dmitry Baryshkov @ 2021-01-13 15:49 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Rob Herring, Lorenzo Pieralisi Cc: linux-arm-msm, Manivannan Sadhasivam, linux-pci On SM8250 additional clock is required for PCIe devices to access NOC. Update PCIe controller driver to control this clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: e1dd639e374a ("PCI: qcom: Add SM8250 SoC support") --- drivers/pci/controller/dwc/pcie-qcom.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index affa2713bf80..e2140aba220a 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -159,8 +159,10 @@ struct qcom_pcie_resources_2_3_3 { struct reset_control *rst[7]; }; +#define QCOM_PCIE_2_7_0_MAX_CLOCKS 7 struct qcom_pcie_resources_2_7_0 { - struct clk_bulk_data clks[6]; + struct clk_bulk_data clks[QCOM_PCIE_2_7_0_MAX_CLOCKS]; + int num_clks; struct regulator_bulk_data supplies[2]; struct reset_control *pci_reset; struct clk *pipe_clk; @@ -1133,6 +1135,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; + bool has_sf_tbu = of_device_is_compatible(dev->of_node, "qcom,pcie-sm8250"); int ret; res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); @@ -1152,8 +1155,14 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) res->clks[3].id = "bus_slave"; res->clks[4].id = "slave_q2a"; res->clks[5].id = "tbu"; + if (has_sf_tbu) { + res->clks[6].id = "ddrss_sf_tbu"; + res->num_clks = 7; + } else { + res->num_clks = 6; + } - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); + ret = devm_clk_bulk_get(dev, res->num_clks, res->clks); if (ret < 0) return ret; @@ -1175,7 +1184,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) return ret; } - ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks); + ret = clk_bulk_prepare_enable(res->num_clks, res->clks); if (ret < 0) goto err_disable_regulators; @@ -1227,7 +1236,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) return 0; err_disable_clocks: - clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); + clk_bulk_disable_unprepare(res->num_clks, res->clks); err_disable_regulators: regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); @@ -1238,7 +1247,7 @@ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie) { struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; - clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); + clk_bulk_disable_unprepare(res->num_clks, res->clks); regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); } -- 2.29.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock 2021-01-13 15:49 ` [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock Dmitry Baryshkov @ 2021-01-16 16:26 ` Manivannan Sadhasivam 0 siblings, 0 replies; 4+ messages in thread From: Manivannan Sadhasivam @ 2021-01-16 16:26 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Andy Gross, Bjorn Andersson, Rob Herring, Lorenzo Pieralisi, linux-arm-msm, linux-pci On Wed, Jan 13, 2021 at 06:49:35PM +0300, Dmitry Baryshkov wrote: > On SM8250 additional clock is required for PCIe devices to access NOC. > Update PCIe controller driver to control this clock. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Fixes: e1dd639e374a ("PCI: qcom: Add SM8250 SoC support") Just couple of comments below, with that addressed: Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Thanks, Mani > --- > drivers/pci/controller/dwc/pcie-qcom.c | 19 ++++++++++++++----- > 1 file changed, 14 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index affa2713bf80..e2140aba220a 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -159,8 +159,10 @@ struct qcom_pcie_resources_2_3_3 { > struct reset_control *rst[7]; > }; > > +#define QCOM_PCIE_2_7_0_MAX_CLOCKS 7 > struct qcom_pcie_resources_2_7_0 { > - struct clk_bulk_data clks[6]; > + struct clk_bulk_data clks[QCOM_PCIE_2_7_0_MAX_CLOCKS]; Just use 7 directly and mention in comment that SM8250 needs an extra clock. > + int num_clks; > struct regulator_bulk_data supplies[2]; > struct reset_control *pci_reset; > struct clk *pipe_clk; > @@ -1133,6 +1135,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) > struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; > struct dw_pcie *pci = pcie->pci; > struct device *dev = pci->dev; > + bool has_sf_tbu = of_device_is_compatible(dev->of_node, "qcom,pcie-sm8250"); > int ret; > > res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); > @@ -1152,8 +1155,14 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) > res->clks[3].id = "bus_slave"; > res->clks[4].id = "slave_q2a"; > res->clks[5].id = "tbu"; > + if (has_sf_tbu) { Here also you can use the of_device_is_compatible() call directly and avoid a local variable. Thanks, Mani > + res->clks[6].id = "ddrss_sf_tbu"; > + res->num_clks = 7; > + } else { > + res->num_clks = 6; > + } > > - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); > + ret = devm_clk_bulk_get(dev, res->num_clks, res->clks); > if (ret < 0) > return ret; > > @@ -1175,7 +1184,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) > return ret; > } > > - ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks); > + ret = clk_bulk_prepare_enable(res->num_clks, res->clks); > if (ret < 0) > goto err_disable_regulators; > > @@ -1227,7 +1236,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) > > return 0; > err_disable_clocks: > - clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); > + clk_bulk_disable_unprepare(res->num_clks, res->clks); > err_disable_regulators: > regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); > > @@ -1238,7 +1247,7 @@ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie) > { > struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; > > - clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); > + clk_bulk_disable_unprepare(res->num_clks, res->clks); > regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); > } > > -- > 2.29.2 > ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-01-16 17:13 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-01-13 15:49 [PATCH v4 0/2] PCI: qcom: fix PCIe support on sm8250 Dmitry Baryshkov 2021-01-13 15:49 ` [PATCH v4 1/2] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 Dmitry Baryshkov 2021-01-13 15:49 ` [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock Dmitry Baryshkov 2021-01-16 16:26 ` Manivannan Sadhasivam
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