From: Bjorn Helgaas <helgaas@kernel.org>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
lorenzo.pieralisi@arm.com, bhelgaas@google.com,
michals@xilinx.com
Subject: Re: [PATCH 1/2] PCI: xilinx-cpm: Update YAML schemas for Versal CPM5 Root Port
Date: Mon, 7 Feb 2022 12:28:06 -0600 [thread overview]
Message-ID: <20220207182806.GA408432@bhelgaas> (raw)
In-Reply-To: <20220207041250.1658-2-bharat.kumar.gogada@xilinx.com>
It looks like the subject line convention here would be something
like:
dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port
(From "git log --oneline Documentation/devicetree/bindings/pci/")
On Mon, Feb 07, 2022 at 09:42:48AM +0530, Bharat Kumar Gogada wrote:
> Xilinx Versal Premium series has CPM5 block which supports Root port
> functioning at Gen5 speed.
> Add support for YAML schemas documentation for Versal CPM5 Root Port driver.
s/Root port/Root Port/ to be consistent.
Add blank line between paragraphs.
Bjorn
next prev parent reply other threads:[~2022-02-07 18:31 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-07 4:12 [PATCH 0/2] Add support for Xilinx Versal CPM5 Root Port Bharat Kumar Gogada
2022-02-07 4:12 ` [PATCH 1/2] PCI: xilinx-cpm: Update YAML schemas for " Bharat Kumar Gogada
2022-02-07 18:28 ` Bjorn Helgaas [this message]
2022-02-08 10:38 ` Bharat Kumar Gogada
2022-02-07 4:12 ` Bharat Kumar Gogada
2022-02-07 4:12 ` [PATCH 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root Port driver Bharat Kumar Gogada
2022-02-07 18:30 ` Bjorn Helgaas
2022-02-08 10:38 ` Bharat Kumar Gogada
2022-02-07 4:31 ` [PATCH 0/2] Add support for Xilinx Versal CPM5 Root Port Bharat Kumar Gogada
-- strict thread matches above, loose matches on Subject: below --
2022-02-04 13:02 Bharat Kumar Gogada
2022-02-04 13:02 ` [PATCH 1/2] PCI: xilinx-cpm: Update YAML schemas for " Bharat Kumar Gogada
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