[PATCH] lspci: Decode PCIe 6.0 Slot Power Limit values

[PATCH] lspci: Decode PCIe 6.0 Slot Power Limit values

[Pali Rohár]

When the Slot Power Limit Scale field equals 00b (1.0x) and Slot
Power Limit Value exceeds EFh, the following alternative encodings
are used:

  F0h   > 239 W and ≤ 250 W Slot Power Limit
  F1h   > 250 W and ≤ 275 W Slot Power Limit
  F2h   > 275 W and ≤ 300 W Slot Power Limit
  F3h   > 300 W and ≤ 325 W Slot Power Limit
  F4h   > 325 W and ≤ 350 W Slot Power Limit
  F5h   > 350 W and ≤ 375 W Slot Power Limit
  F6h   > 375 W and ≤ 400 W Slot Power Limit
  F7h   > 400 W and ≤ 425 W Slot Power Limit
  F8h   > 425 W and ≤ 450 W Slot Power Limit
  F9h   > 450 W and ≤ 475 W Slot Power Limit
  FAh   > 475 W and ≤ 500 W Slot Power Limit
  FBh   > 500 W and ≤ 525 W Slot Power Limit
  FCh   > 525 W and ≤ 550 W Slot Power Limit
  FDh   > 550 W and ≤ 575 W Slot Power Limit
  FEh   > 575 W and ≤ 600 W Slot Power Limit
  FFh   Reserved for Slot Power Limit Values above 600 W

Previously only values F0h, F1h and F2h were covered.
---
Thanks Bjorn for providing this documentation!
---
 ls-caps.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/ls-caps.c b/ls-caps.c
index b0caa50943d6..0b6c97b3ed75 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -659,18 +659,16 @@ static int exp_downstream_port(int type)
 static void show_power_limit(int value, int scale)
 {
   static const float scales[4] = { 1.0, 0.1, 0.01, 0.001 };
-  static const int scale0_values[3] = { 250, 275, 300 };
 
-  if (scale == 0 && value >= 0xF0)
+  if (scale == 0 && value == 0xFF)
     {
-      /* F3h to FFh = Reserved for Slot Power Limit values above 300 W */
-      if (value >= 0xF3)
-        {
-          printf(">300W");
-          return;
-        }
-      value = scale0_values[value - 0xF0];
+      printf(">600W");
+      return;
     }
+
+  if (scale == 0 && value >= 0xF0 && value <= 0xFE)
+    value = 250 + 25 * (value - 0xF0);
+
   printf("%gW", value * scales[scale]);
 }
 
-- 
2.20.1

Re: [PATCH] lspci: Decode PCIe 6.0 Slot Power Limit values

[Matthew Wilcox]

On Fri, Feb 25, 2022 at 07:12:09PM +0100, Pali Rohár wrote:
> When the Slot Power Limit Scale field equals 00b (1.0x) and Slot
> Power Limit Value exceeds EFh, the following alternative encodings
> are used:

Looks good to me.  Thanks!

Re: [PATCH] lspci: Decode PCIe 6.0 Slot Power Limit values

[Martin Mareš]

Hi!

> When the Slot Power Limit Scale field equals 00b (1.0x) and Slot
> Power Limit Value exceeds EFh, the following alternative encodings
> are used:
[...]

Thanks, applied.

				Martin