From: Alex Williamson <alex.williamson@redhat.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-crypto@vger.kernel.org>, <jgg@nvidia.com>,
<cohuck@redhat.com>, <mgurtovoy@nvidia.com>, <yishaih@nvidia.com>,
<linuxarm@huawei.com>, <liulongfang@huawei.com>,
<prime.zeng@hisilicon.com>, <jonathan.cameron@huawei.com>,
<wangzhou1@hisilicon.com>,
bhelgaas@google.com, linux-pci@vger.kernel.org
Subject: Re: [PATCH v6 03/10] hisi_acc_qm: Move PCI device IDs to common header
Date: Mon, 28 Feb 2022 10:33:38 -0700 [thread overview]
Message-ID: <20220228103338.76da0b3b.alex.williamson@redhat.com> (raw)
In-Reply-To: <20220228090121.1903-4-shameerali.kolothum.thodi@huawei.com>
[Cc+ Bjorn, linux-pci]
On Mon, 28 Feb 2022 09:01:14 +0000
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> wrote:
> Move the PCI Device IDs of HiSilicon ACC devices to
> a common header and use a uniform naming convention.
>
> This will be useful when we introduce the vfio PCI
> HiSilicon ACC live migration driver in subsequent patches.
>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> ---
> drivers/crypto/hisilicon/hpre/hpre_main.c | 12 +++++-------
> drivers/crypto/hisilicon/sec2/sec_main.c | 14 ++++++--------
> drivers/crypto/hisilicon/zip/zip_main.c | 11 ++++-------
> include/linux/pci_ids.h | 6 ++++++
> 4 files changed, 21 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
> index ebfab3e14499..ba4043447e53 100644
> --- a/drivers/crypto/hisilicon/hpre/hpre_main.c
> +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
> @@ -68,8 +68,6 @@
> #define HPRE_REG_RD_INTVRL_US 10
> #define HPRE_REG_RD_TMOUT_US 1000
> #define HPRE_DBGFS_VAL_MAX_LEN 20
> -#define HPRE_PCI_DEVICE_ID 0xa258
> -#define HPRE_PCI_VF_DEVICE_ID 0xa259
> #define HPRE_QM_USR_CFG_MASK GENMASK(31, 1)
> #define HPRE_QM_AXI_CFG_MASK GENMASK(15, 0)
> #define HPRE_QM_VFG_AX_MASK GENMASK(7, 0)
> @@ -111,8 +109,8 @@
> static const char hpre_name[] = "hisi_hpre";
> static struct dentry *hpre_debugfs_root;
> static const struct pci_device_id hpre_dev_ids[] = {
> - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PCI_DEVICE_ID) },
> - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PCI_VF_DEVICE_ID) },
> + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HUAWEI_HPRE_PF) },
> + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HUAWEI_HPRE_VF) },
> { 0, }
> };
>
> @@ -242,7 +240,7 @@ MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
>
> static int pf_q_num_set(const char *val, const struct kernel_param *kp)
> {
> - return q_num_set(val, kp, HPRE_PCI_DEVICE_ID);
> + return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_HPRE_PF);
> }
>
> static const struct kernel_param_ops hpre_pf_q_num_ops = {
> @@ -921,7 +919,7 @@ static int hpre_debugfs_init(struct hisi_qm *qm)
> qm->debug.sqe_mask_len = HPRE_SQE_MASK_LEN;
> hisi_qm_debug_init(qm);
>
> - if (qm->pdev->device == HPRE_PCI_DEVICE_ID) {
> + if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_HPRE_PF) {
> ret = hpre_ctrl_debug_init(qm);
> if (ret)
> goto failed_to_create;
> @@ -958,7 +956,7 @@ static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
> qm->sqe_size = HPRE_SQE_SIZE;
> qm->dev_name = hpre_name;
>
> - qm->fun_type = (pdev->device == HPRE_PCI_DEVICE_ID) ?
> + qm->fun_type = (pdev->device == PCI_DEVICE_ID_HUAWEI_HPRE_PF) ?
> QM_HW_PF : QM_HW_VF;
> if (qm->fun_type == QM_HW_PF) {
> qm->qp_base = HPRE_PF_DEF_Q_BASE;
> diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
> index 26d3ab1d308b..ab806fb481ac 100644
> --- a/drivers/crypto/hisilicon/sec2/sec_main.c
> +++ b/drivers/crypto/hisilicon/sec2/sec_main.c
> @@ -20,8 +20,6 @@
>
> #define SEC_VF_NUM 63
> #define SEC_QUEUE_NUM_V1 4096
> -#define SEC_PF_PCI_DEVICE_ID 0xa255
> -#define SEC_VF_PCI_DEVICE_ID 0xa256
>
> #define SEC_BD_ERR_CHK_EN0 0xEFFFFFFF
> #define SEC_BD_ERR_CHK_EN1 0x7ffff7fd
> @@ -225,7 +223,7 @@ static const struct debugfs_reg32 sec_dfx_regs[] = {
>
> static int sec_pf_q_num_set(const char *val, const struct kernel_param *kp)
> {
> - return q_num_set(val, kp, SEC_PF_PCI_DEVICE_ID);
> + return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_SEC_PF);
> }
>
> static const struct kernel_param_ops sec_pf_q_num_ops = {
> @@ -313,8 +311,8 @@ module_param_cb(uacce_mode, &sec_uacce_mode_ops, &uacce_mode, 0444);
> MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
>
> static const struct pci_device_id sec_dev_ids[] = {
> - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, SEC_PF_PCI_DEVICE_ID) },
> - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, SEC_VF_PCI_DEVICE_ID) },
> + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HUAWEI_SEC_PF) },
> + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HUAWEI_SEC_VF) },
> { 0, }
> };
> MODULE_DEVICE_TABLE(pci, sec_dev_ids);
> @@ -717,7 +715,7 @@ static int sec_core_debug_init(struct hisi_qm *qm)
> regset->base = qm->io_base;
> regset->dev = dev;
>
> - if (qm->pdev->device == SEC_PF_PCI_DEVICE_ID)
> + if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF)
> debugfs_create_file("regs", 0444, tmp_d, regset, &sec_regs_fops);
>
> for (i = 0; i < ARRAY_SIZE(sec_dfx_labels); i++) {
> @@ -735,7 +733,7 @@ static int sec_debug_init(struct hisi_qm *qm)
> struct sec_dev *sec = container_of(qm, struct sec_dev, qm);
> int i;
>
> - if (qm->pdev->device == SEC_PF_PCI_DEVICE_ID) {
> + if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF) {
> for (i = SEC_CLEAR_ENABLE; i < SEC_DEBUG_FILE_NUM; i++) {
> spin_lock_init(&sec->debug.files[i].lock);
> sec->debug.files[i].index = i;
> @@ -877,7 +875,7 @@ static int sec_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
> qm->sqe_size = SEC_SQE_SIZE;
> qm->dev_name = sec_name;
>
> - qm->fun_type = (pdev->device == SEC_PF_PCI_DEVICE_ID) ?
> + qm->fun_type = (pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF) ?
> QM_HW_PF : QM_HW_VF;
> if (qm->fun_type == QM_HW_PF) {
> qm->qp_base = SEC_PF_DEF_Q_BASE;
> diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
> index 678f8b58ec42..f4a517728385 100644
> --- a/drivers/crypto/hisilicon/zip/zip_main.c
> +++ b/drivers/crypto/hisilicon/zip/zip_main.c
> @@ -15,9 +15,6 @@
> #include <linux/uacce.h>
> #include "zip.h"
>
> -#define PCI_DEVICE_ID_ZIP_PF 0xa250
> -#define PCI_DEVICE_ID_ZIP_VF 0xa251
> -
> #define HZIP_QUEUE_NUM_V1 4096
>
> #define HZIP_CLOCK_GATE_CTRL 0x301004
> @@ -246,7 +243,7 @@ MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
>
> static int pf_q_num_set(const char *val, const struct kernel_param *kp)
> {
> - return q_num_set(val, kp, PCI_DEVICE_ID_ZIP_PF);
> + return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_ZIP_PF);
> }
>
> static const struct kernel_param_ops pf_q_num_ops = {
> @@ -268,8 +265,8 @@ module_param_cb(vfs_num, &vfs_num_ops, &vfs_num, 0444);
> MODULE_PARM_DESC(vfs_num, "Number of VFs to enable(1-63), 0(default)");
>
> static const struct pci_device_id hisi_zip_dev_ids[] = {
> - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_ZIP_PF) },
> - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_ZIP_VF) },
> + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HUAWEI_ZIP_PF) },
> + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HUAWEI_ZIP_VF) },
> { 0, }
> };
> MODULE_DEVICE_TABLE(pci, hisi_zip_dev_ids);
> @@ -838,7 +835,7 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
> qm->sqe_size = HZIP_SQE_SIZE;
> qm->dev_name = hisi_zip_name;
>
> - qm->fun_type = (pdev->device == PCI_DEVICE_ID_ZIP_PF) ?
> + qm->fun_type = (pdev->device == PCI_DEVICE_ID_HUAWEI_ZIP_PF) ?
> QM_HW_PF : QM_HW_VF;
> if (qm->fun_type == QM_HW_PF) {
> qm->qp_base = HZIP_PF_DEF_Q_BASE;
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index aad54c666407..6b98e0d91f0a 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2529,6 +2529,12 @@
> #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff
>
> #define PCI_VENDOR_ID_HUAWEI 0x19e5
> +#define PCI_DEVICE_ID_HUAWEI_ZIP_PF 0xa250
> +#define PCI_DEVICE_ID_HUAWEI_ZIP_VF 0xa251
> +#define PCI_DEVICE_ID_HUAWEI_SEC_PF 0xa255
> +#define PCI_DEVICE_ID_HUAWEI_SEC_VF 0xa256
> +#define PCI_DEVICE_ID_HUAWEI_HPRE_PF 0xa258
> +#define PCI_DEVICE_ID_HUAWEI_HPRE_VF 0xa259
>
> #define PCI_VENDOR_ID_NETRONOME 0x19ee
> #define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
next parent reply other threads:[~2022-02-28 17:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20220228090121.1903-1-shameerali.kolothum.thodi@huawei.com>
[not found] ` <20220228090121.1903-4-shameerali.kolothum.thodi@huawei.com>
2022-02-28 17:33 ` Alex Williamson [this message]
2022-02-28 20:12 ` [PATCH v6 03/10] hisi_acc_qm: Move PCI device IDs to common header Bjorn Helgaas
2022-02-28 20:23 ` Alex Williamson
2022-02-28 20:55 ` Bjorn Helgaas
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