From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>
Cc: linux-kernel@vger.kernel.org,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 1/2] PCI: Add PCI_EXP_DPC_* field details
Date: Fri, 13 Oct 2023 14:20:03 +0300 [thread overview]
Message-ID: <20231013112004.4239-2-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20231013112004.4239-1-ilpo.jarvinen@linux.intel.com>
Add PCI_EXP_DPC_RP_PIO_FEP and PCI_EXP_DPC_STATUS_TRIGGER_RSN_*
to be able to replace literals with them.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
include/uapi/linux/pci_regs.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index e5f558d96493..ce4512147ee7 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -1042,9 +1042,16 @@
#define PCI_EXP_DPC_STATUS 0x08 /* DPC Status */
#define PCI_EXP_DPC_STATUS_TRIGGER 0x0001 /* Trigger Status */
#define PCI_EXP_DPC_STATUS_TRIGGER_RSN 0x0006 /* Trigger Reason */
+#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_UNCOR 0x0000 /* DPC due to unmasked uncorrectable error */
+#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_NFE 0x0002 /* DPC due to receiving ERR_NONFATAL */
+#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_FE 0x0004 /* DPC due to receiving ERR_FATAL */
+#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_IN_EXT 0x0006 /* Reason in Trig Reason Extension field */
#define PCI_EXP_DPC_STATUS_INTERRUPT 0x0008 /* Interrupt Status */
#define PCI_EXP_DPC_RP_BUSY 0x0010 /* Root Port Busy */
#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT 0x0060 /* Trig Reason Extension */
+#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_RP_PIO 0x0000 /* DPC due to RP PIO error */
+#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_SW_TRIGGER 0x0020 /* DPC due to DPC SW Trigger bit */
+#define PCI_EXP_DPC_RP_PIO_FEP 0x1f00 /* Root Port PIO First Error Pointer */
#define PCI_EXP_DPC_SOURCE_ID 0x0A /* DPC Source Identifier */
--
2.30.2
next prev parent reply other threads:[~2023-10-13 11:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 11:20 [PATCH 0/2] PCI/DPC: Improve register field accessing Ilpo Järvinen
2023-10-13 11:20 ` Ilpo Järvinen [this message]
2023-10-13 11:20 ` [PATCH 2/2] PCI/DPC: Use defines with register fields Ilpo Järvinen
2023-10-13 20:19 ` Bjorn Helgaas
2023-10-16 12:53 ` Ilpo Järvinen
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