Re: [PATCH v5] PCI: dwc: Wait for link up only if link is started

[Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>]

On Mon, Jan 29, 2024 at 01:34:52PM +0530, Ajay Agarwal wrote:
> On Mon, Jan 29, 2024 at 12:40:25PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Jan 29, 2024 at 12:21:51PM +0530, Ajay Agarwal wrote:
> > > On Sat, Jan 20, 2024 at 08:04:34PM +0530, Manivannan Sadhasivam wrote:
> > > > On Fri, Jan 19, 2024 at 11:29:22PM +0530, Ajay Agarwal wrote:
> > > > > On Fri, Jan 19, 2024 at 01:22:19PM +0530, Manivannan Sadhasivam wrote:
> > > > > > On Fri, Jan 12, 2024 at 03:00:06PM +0530, Ajay Agarwal wrote:
> > > > > > > In dw_pcie_host_init() regardless of whether the link has been
> > > > > > > started or not, the code waits for the link to come up. Even in
> > > > > > > cases where start_link() is not defined the code ends up spinning
> > > > > > > in a loop for 1 second. Since in some systems dw_pcie_host_init()
> > > > > > > gets called during probe, this one second loop for each pcie
> > > > > > > interface instance ends up extending the boot time.
> > > > > > > 
> > > > > > 
> > > > > > Which platform you are working on? Is that upstreamed? You should mention the
> > > > > > specific platform where you are observing the issue.
> > > > > >
> > > > > This is for the Pixel phone platform. The platform driver for the same
> > > > > is not upstreamed yet. It is in the process.
> > > > > 
> > > > 
> > > > Then you should submit this patch at the time of the driver submission. Right
> > > > now, you are trying to fix a problem which is not present in upstream. One can
> > > > argue that it is a problem for designware-plat driver, but honestly I do not
> > > > know how it works.
> > > > 
> > > > - Mani
> > > >
> > > Yes Mani, this can be a problem for the designware-plat driver. To me,
> > > the problem of a second being wasted in the probe path seems pretty
> > > obvious. We will wait for the link to be up even though we are not
> > > starting the link training. Can this patch be accepted considering the
> > > problem in the dw-plat driver then?
> > > 
> > 
> > If that's the case with your driver, when are you starting the link training?
> > 
> The link training starts later based on a userspace/debugfs trigger.
> 

Why does it happen as such? What's the problem in starting the link during
probe? Keep it in mind that if you rely on the userspace for starting the link
based on a platform (like Android), then if the same SoC or peripheral instance
get reused in other platform (non-android), the it won't be a seamless user
experience.

If there are any other usecases, please state them.

- Mani

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