* [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP
@ 2024-07-25 7:35 Richard Zhu
2024-07-25 7:35 ` [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint Richard Zhu
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Richard Zhu @ 2024-07-25 7:35 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, l.stach
Cc: hongxing.zhu, devicetree, linux-pci, linux-arm-kernel,
linux-kernel, kernel, imx
v3 changes:
- Refine the commit descriptions.
v2 changes:
Thanks for Conor's comments.
- Place the new added properties at the end.
Ideally, dbi2 and atu base addresses should be fetched from DT.
Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
[PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
[PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ
[PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP
[PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13 +++++++++----
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 +++++---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++--
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 +++++---
4 files changed, 24 insertions(+), 12 deletions(-)
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint
2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
@ 2024-07-25 7:35 ` Richard Zhu
2024-07-25 7:35 ` [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP Richard Zhu
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Richard Zhu @ 2024-07-25 7:35 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, l.stach
Cc: hongxing.zhu, devicetree, linux-pci, linux-arm-kernel,
linux-kernel, kernel, imx
Add reg-name: "dbi2", "atu" for i.MX8M PCIe Endpoint.
For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the driver.
This method is not good.
In commit b7d67c6130ee ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
Frank suggests to fetch the dbi2 and atu from DT directly.
This commit is preparation to do that for i.MX8M PCIe EP.
These changes wouldn't break driver function.
When "dbi2" and "atu" properties are present, i.MX PCIe driver would
fetch the according base address from DT directly.
If only two reg properties are provided, i.MX PCIe driver would falls
back to the old method.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
.../devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
index a06f75df8458..84ca12e8b25b 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
@@ -65,12 +65,14 @@ allOf:
then:
properties:
reg:
- minItems: 2
- maxItems: 2
+ minItems: 4
+ maxItems: 4
reg-names:
items:
- const: dbi
- const: addr_space
+ - const: dbi2
+ - const: atu
- if:
properties:
@@ -129,8 +131,11 @@ examples:
pcie_ep: pcie-ep@33800000 {
compatible = "fsl,imx8mp-pcie-ep";
- reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>;
- reg-names = "dbi", "addr_space";
+ reg = <0x33800000 0x100000>,
+ <0x18000000 0x8000000>,
+ <0x33900000 0x100000>,
+ <0x33b00000 0x100000>;
+ reg-names = "dbi", "addr_space", "dbi2", "atu";
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_HSIO_AXI>,
<&clk IMX8MP_CLK_PCIE_ROOT>;
--
2.37.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP
2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
2024-07-25 7:35 ` [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint Richard Zhu
@ 2024-07-25 7:35 ` Richard Zhu
2024-07-25 7:35 ` [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP " Richard Zhu
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Richard Zhu @ 2024-07-25 7:35 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, l.stach
Cc: hongxing.zhu, devicetree, linux-pci, linux-arm-kernel,
linux-kernel, kernel, imx
Add dbi2 and iatu reg for i.MX8MQ PCIe EP.
For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the driver.
This method is not good.
In commit b7d67c6130ee ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
Frank suggests to fetch the dbi2 and atu from DT directly.
This commit is preparation to do that for i.MX8MQ PCIe EP.
These changes wouldn't break driver function.
When "dbi2" and "atu" properties are present, i.MX PCIe driver would
fetch the according base address from DT directly.
If only two reg properties are provided, i.MX PCIe driver would falls
back to the old method.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index e03186bbc415..d51de8d899b2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1819,9 +1819,11 @@ pcie1: pcie@33c00000 {
pcie1_ep: pcie-ep@33c00000 {
compatible = "fsl,imx8mq-pcie-ep";
- reg = <0x33c00000 0x000400000>,
- <0x20000000 0x08000000>;
- reg-names = "dbi", "addr_space";
+ reg = <0x33c00000 0x100000>,
+ <0x20000000 0x8000000>,
+ <0x33d00000 0x100000>,
+ <0x33f00000 0x100000>;
+ reg-names = "dbi", "addr_space", "dbi2", "atu";
num-lanes = <1>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dma";
--
2.37.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP PCIe EP
2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
2024-07-25 7:35 ` [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint Richard Zhu
2024-07-25 7:35 ` [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP Richard Zhu
@ 2024-07-25 7:35 ` Richard Zhu
2024-07-25 7:35 ` [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM " Richard Zhu
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Richard Zhu @ 2024-07-25 7:35 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, l.stach
Cc: hongxing.zhu, devicetree, linux-pci, linux-arm-kernel,
linux-kernel, kernel, imx
Add dbi2 and iatu reg for i.MX8MP PCIe EP.
For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the driver.
This method is not good.
In commit b7d67c6130ee ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
Frank suggests to fetch the dbi2 and atu from DT directly.
This commit is preparation to do that for i.MX8MP PCIe EP.
These changes wouldn't break driver function.
When "dbi2" and "atu" properties are present, i.MX PCIe driver would
fetch the according base address from DT directly.
If only two reg properties are provided, i.MX PCIe driver would falls
back to the old method.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 603dfe80216f..53748227db10 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2125,8 +2125,11 @@ pcie: pcie@33800000 {
pcie_ep: pcie-ep@33800000 {
compatible = "fsl,imx8mp-pcie-ep";
- reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>;
- reg-names = "dbi", "addr_space";
+ reg = <0x33800000 0x100000>,
+ <0x18000000 0x8000000>,
+ <0x33900000 0x100000>,
+ <0x33b00000 0x100000>;
+ reg-names = "dbi", "addr_space", "dbi2", "atu";
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_HSIO_AXI>,
<&clk IMX8MP_CLK_PCIE_ROOT>;
--
2.37.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM PCIe EP
2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
` (2 preceding siblings ...)
2024-07-25 7:35 ` [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP " Richard Zhu
@ 2024-07-25 7:35 ` Richard Zhu
2024-07-25 16:54 ` [PATCH v3 0/4] Add dbi2 and atu for i.MX8M " Frank Li
2024-07-25 20:43 ` Bjorn Helgaas
5 siblings, 0 replies; 8+ messages in thread
From: Richard Zhu @ 2024-07-25 7:35 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, l.stach
Cc: hongxing.zhu, devicetree, linux-pci, linux-arm-kernel,
linux-kernel, kernel, imx
Add dbi2 and iatu reg for i.MX8MM PCIe EP.
For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the driver.
This method is not good.
In commit b7d67c6130ee ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
Frank suggests to fetch the dbi2 and atu from DT directly.
This commit is preparation to do that for i.MX8MM PCIe EP.
These changes wouldn't break driver function.
When "dbi2" and "atu" properties are present, i.MX PCIe driver would
fetch the according base address from DT directly.
If only two reg properties are provided, i.MX PCIe driver would falls
back to the old method.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 9535dedcef59..4de3bf22902b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1375,9 +1375,11 @@ pcie0: pcie@33800000 {
pcie0_ep: pcie-ep@33800000 {
compatible = "fsl,imx8mm-pcie-ep";
- reg = <0x33800000 0x400000>,
- <0x18000000 0x8000000>;
- reg-names = "dbi", "addr_space";
+ reg = <0x33800000 0x100000>,
+ <0x18000000 0x8000000>,
+ <0x33900000 0x100000>,
+ <0x33b00000 0x100000>;
+ reg-names = "dbi", "addr_space", "dbi2", "atu";
num-lanes = <1>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dma";
--
2.37.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP
2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
` (3 preceding siblings ...)
2024-07-25 7:35 ` [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM " Richard Zhu
@ 2024-07-25 16:54 ` Frank Li
2024-07-25 20:43 ` Bjorn Helgaas
5 siblings, 0 replies; 8+ messages in thread
From: Frank Li @ 2024-07-25 16:54 UTC (permalink / raw)
To: Richard Zhu
Cc: robh, krzk+dt, conor+dt, shawnguo, l.stach, devicetree, linux-pci,
linux-arm-kernel, linux-kernel, kernel, imx
On Thu, Jul 25, 2024 at 03:35:12PM +0800, Richard Zhu wrote:
> v3 changes:
> - Refine the commit descriptions.
>
> v2 changes:
> Thanks for Conor's comments.
> - Place the new added properties at the end.
>
> Ideally, dbi2 and atu base addresses should be fetched from DT.
> Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
>
> [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
> [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ
> [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP
> [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM
for all patches:
Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13 +++++++++----
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 +++++---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++--
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 +++++---
> 4 files changed, 24 insertions(+), 12 deletions(-)
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP
2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
` (4 preceding siblings ...)
2024-07-25 16:54 ` [PATCH v3 0/4] Add dbi2 and atu for i.MX8M " Frank Li
@ 2024-07-25 20:43 ` Bjorn Helgaas
2024-07-26 2:00 ` Hongxing Zhu
5 siblings, 1 reply; 8+ messages in thread
From: Bjorn Helgaas @ 2024-07-25 20:43 UTC (permalink / raw)
To: Richard Zhu
Cc: robh, krzk+dt, conor+dt, shawnguo, l.stach, devicetree, linux-pci,
linux-arm-kernel, linux-kernel, kernel, imx
On Thu, Jul 25, 2024 at 03:35:12PM +0800, Richard Zhu wrote:
> v3 changes:
> - Refine the commit descriptions.
>
> v2 changes:
> Thanks for Conor's comments.
> - Place the new added properties at the end.
>
> Ideally, dbi2 and atu base addresses should be fetched from DT.
> Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
>
> [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
> [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ
> [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP
> [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM
>
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13 +++++++++----
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 +++++---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++--
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 +++++---
> 4 files changed, 24 insertions(+), 12 deletions(-)
For all the patches in this series, can you please:
- Separate paragraphs with blank lines so we know where they end.
- Wrap commit log to fill 75 columns.
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP
2024-07-25 20:43 ` Bjorn Helgaas
@ 2024-07-26 2:00 ` Hongxing Zhu
0 siblings, 0 replies; 8+ messages in thread
From: Hongxing Zhu @ 2024-07-26 2:00 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
shawnguo@kernel.org, l.stach@pengutronix.de,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
imx@lists.linux.dev
> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: 2024年7月26日 4:44
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> shawnguo@kernel.org; l.stach@pengutronix.de; devicetree@vger.kernel.org;
> linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; imx@lists.linux.dev
> Subject: Re: [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP
>
> On Thu, Jul 25, 2024 at 03:35:12PM +0800, Richard Zhu wrote:
> > v3 changes:
> > - Refine the commit descriptions.
> >
> > v2 changes:
> > Thanks for Conor's comments.
> > - Place the new added properties at the end.
> >
> > Ideally, dbi2 and atu base addresses should be fetched from DT.
> > Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
> >
> > [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
> > [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ
> > [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP
> > [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM
> >
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13
> +++++++++----
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8
> +++++---
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7
> +++++--
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8
> +++++---
> > 4 files changed, 24 insertions(+), 12 deletions(-)
>
> For all the patches in this series, can you please:
>
> - Separate paragraphs with blank lines so we know where they end.
>
> - Wrap commit log to fill 75 columns.
Hi Bjorn:
Sure.
How about to change the commit message to the following format?
"
Add reg-name: "dbi2", "atu" for i.MX8M PCIe Endpoint.
For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the
driver. This method is not good.
In commit b7d67c6130ee ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
Frank suggests to fetch the dbi2 and atu from DT directly. This commit is
preparation to do that for i.MX8M PCIe EP.
These changes wouldn't break driver function. When "dbi2" and "atu"
properties are present, i.MX PCIe driver would fetch the according base
addresses from DT directly. If only two reg properties are provided, i.MX
PCIe driver would falls back to the old method.
"
Thanks for your comments.
Best Regards
Richard Zhu
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-07-26 2:00 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2024-07-25 7:35 [PATCH v3 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
2024-07-25 7:35 ` [PATCH v3 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint Richard Zhu
2024-07-25 7:35 ` [PATCH v3 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP Richard Zhu
2024-07-25 7:35 ` [PATCH v3 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP " Richard Zhu
2024-07-25 7:35 ` [PATCH v3 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM " Richard Zhu
2024-07-25 16:54 ` [PATCH v3 0/4] Add dbi2 and atu for i.MX8M " Frank Li
2024-07-25 20:43 ` Bjorn Helgaas
2024-07-26 2:00 ` Hongxing Zhu
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