From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Maciej W. Rozycki" <macro@orcam.me.uk>,
"Lukas Wunner" <lukas@wunner.de>,
"Alexandru Gagniuc" <mr.nuke.me@gmail.com>,
"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
"Srinivas Pandruvada" <srinivas.pandruvada@linux.intel.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
linux-pm@vger.kernel.org,
"Smita Koralahalli" <Smita.KoralahalliChannabasappa@amd.com>,
"Shuah Khan" <shuah@kernel.org>,
linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
"Amit Kucheria" <amitk@kernel.org>,
"Zhang Rui" <rui.zhang@intel.com>,
"Christophe JAILLET" <christophe.jaillet@wanadoo.fr>
Subject: Re: [PATCH v8 8/8] selftests/pcie_bwctrl: Create selftests
Date: Thu, 17 Oct 2024 12:08:59 +0100 [thread overview]
Message-ID: <20241017120859.00004713@Huawei.com> (raw)
In-Reply-To: <20241009095223.7093-9-ilpo.jarvinen@linux.intel.com>
On Wed, 9 Oct 2024 12:52:23 +0300
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> wrote:
> Create selftests for PCIe BW control through the PCIe cooling device
> sysfs interface.
>
> First, the BW control selftest finds the PCIe Port to test with. By
> default, the PCIe Port with the highest Link Speed is selected but
> another PCIe Port can be provided with -d parameter.
>
> The actual test steps the cur_state of the cooling device one-by-one
> from max_state to what the cur_state was initially. The speed change
> is confirmed by observing the current_link_speed for the corresponding
> PCIe Port.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
My bash is terrible, but as far as I can tell this looks reasonable.
So with that in mind take this with a pinch of salt.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
prev parent reply other threads:[~2024-10-17 11:09 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-09 9:52 [PATCH v8 0/8] PCI: Add PCIe bandwidth controller Ilpo Järvinen
2024-10-09 9:52 ` [PATCH v8 1/8] PCI: Protect Link Control 2 Register with RMW locking Ilpo Järvinen
2024-10-17 10:12 ` Jonathan Cameron
2024-10-17 10:30 ` Ilpo Järvinen
2024-10-09 9:52 ` [PATCH v8 2/8] PCI: Store all PCIe Supported Link Speeds Ilpo Järvinen
2024-10-17 10:25 ` Jonathan Cameron
2024-10-09 9:52 ` [PATCH v8 3/8] PCI: Refactor pcie_update_link_speed() Ilpo Järvinen
2024-10-17 10:26 ` Jonathan Cameron
2024-10-09 9:52 ` [PATCH v8 4/8] PCI/quirks: Abstract LBMS seen check into own function Ilpo Järvinen
2024-10-17 10:29 ` Jonathan Cameron
2024-10-09 9:52 ` [PATCH v8 5/8] PCI/bwctrl: Re-add BW notification portdrv as PCIe BW controller Ilpo Järvinen
2024-10-17 10:48 ` Jonathan Cameron
2024-10-09 9:52 ` [PATCH v8 6/8] PCI/bwctrl: Add API to set PCIe Link Speed Ilpo Järvinen
2024-10-17 11:02 ` Jonathan Cameron
2024-10-17 13:16 ` Ilpo Järvinen
2024-10-09 9:52 ` [PATCH v8 7/8] thermal: Add PCIe cooling driver Ilpo Järvinen
2024-10-17 11:04 ` Jonathan Cameron
2024-10-17 12:16 ` Ilpo Järvinen
2024-10-17 12:58 ` Rafael J. Wysocki
2024-10-17 13:02 ` Ilpo Järvinen
2024-10-17 13:28 ` Jonathan Cameron
2024-10-09 9:52 ` [PATCH v8 8/8] selftests/pcie_bwctrl: Create selftests Ilpo Järvinen
2024-10-17 11:08 ` Jonathan Cameron [this message]
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