Re: [PATCH 1/2] PCI: dwc: ep: Fix dw_pcie_ep_align_addr()

[Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>]

On Thu, Oct 17, 2024 at 03:20:54PM +0200, Niklas Cassel wrote:
> ep->page_size is defined by the EPC drivers.
> Some drivers e.g. pci-imx6.c defines this to 4K for imx95.
> 
> dw_pcie_ep_init() will call pci_epc_mem_init() with ep->page_size.
> pci_epc_mem_init() will call pci_epc_multi_mem_init().
> 
> pci_epc_multi_mem_init() will initialize mem->window.page_size.
> If the provided page_size (ep->page_size) is smaller than PAGE_SIZE,
> it will initialize mem->window.page_size to PAGE_SIZE rather than
> ep->page_size.
> 
> Thus, mem->window.page_size can be larger than ep->page_size, e.g.
> for a platform built with PAGE_SIZE == 64K, while using a EPC driver
> that defines ep->page_size to 4k.
> 
> Therefore, modify dw_pcie_ep_align_addr() to use
> epc->mem->window.page_size rather than ep->page_size.
> 
> Signed-off-by: Niklas Cassel <cassel@kernel.org>

Fixes: a1cd1d901a5c ("PCI: dwc: endpoint: Implement the pci_epc_ops::align_addr() operation")

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

- Mani

> ---
>  drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 2d0e7bf17919..20f67fd85e83 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -276,7 +276,7 @@ static u64 dw_pcie_ep_align_addr(struct pci_epc *epc, u64 pci_addr,
>  	u64 mask = pci->region_align - 1;
>  	size_t ofst = pci_addr & mask;
>  
> -	*pci_size = ALIGN(ofst + *pci_size, ep->page_size);
> +	*pci_size = ALIGN(ofst + *pci_size, epc->mem->window.page_size);
>  	*offset = ofst;
>  
>  	return pci_addr & ~mask;
> -- 
> 2.47.0
> 

-- 
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