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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Mayank Rana <quic_mrana@quicinc.com>
Cc: jingoohan1@gmail.com, will@kernel.org, lpieralisi@kernel.org,
	kw@linux.com, robh@kernel.org, bhelgaas@google.com,
	krzk@kernel.org, linux-pci@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	quic_krichai@quicinc.com
Subject: Re: [PATCH v3 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex
Date: Tue, 19 Nov 2024 22:40:37 +0530	[thread overview]
Message-ID: <20241119171037.53zxi47u643zztvx@thinkpad> (raw)
In-Reply-To: <6e9db73e-0441-453c-978c-961f308f8a11@quicinc.com>

On Fri, Nov 15, 2024 at 10:31:17AM -0800, Mayank Rana wrote:
> 
> 
> On 11/15/2024 3:28 AM, Manivannan Sadhasivam wrote:
> > On Wed, Nov 06, 2024 at 02:13:37PM -0800, Mayank Rana wrote:
> > > Based on received feedback, this patch series adds support with existing
> > > Linux qcom-pcie.c driver to get PCIe host root complex functionality on
> > > Qualcomm SA8255P auto platform.
> > > 
> > > 1. Interface to allow requesting firmware to manage system resources and
> > > performing PCIe Link up (devicetree binding in terms of power domain and
> > > runtime PM APIs is used in driver)
> > > 
> > > 2. SA8255P is using Synopsys Designware PCIe controller which supports MSI
> > > controller. Using existing MSI controller based functionality by exporting
> > > important pcie dwc core driver based MSI APIs, and using those from
> > > pcie-qcom.c driver.
> > > 
> > > Below architecture is used on Qualcomm SA8255P auto platform to get ECAM
> > > compliant PCIe controller based functionality. Here firmware VM based PCIe
> > > driver takes care of resource management and performing PCIe link related
> > > handling (D0 and D3cold). Linux pcie-qcom.c driver uses power domain to
> > > request firmware VM to perform these operations using SCMI interface.
> > > --------------------
> > > 
> > > 
> > >                                     ┌────────────────────────┐
> > >                                     │                        │
> > >    ┌──────────────────────┐         │     SHARED MEMORY      │            ┌──────────────────────────┐
> > >    │     Firmware VM      │         │                        │            │         Linux VM         │
> > >    │ ┌─────────┐          │         │                        │            │    ┌────────────────┐    │
> > >    │ │ Drivers │ ┌──────┐ │         │                        │            │    │   PCIE Qcom    │    │
> > >    │ │ PCIE PHY◄─┤      │ │         │   ┌────────────────┐   │            │    │    driver      │    │
> > >    │ │         │ │ SCMI │ │         │   │                │   │            │    │                │    │
> > >    │ │PCIE CTL │ │      │ ├─────────┼───►    PCIE        ◄───┼─────┐      │    └──┬──────────▲──┘    │
> > >    │ │         ├─►Server│ │         │   │    SHMEM       │   │     │      │       │          │       │
> > >    │ │Clk, Vreg│ │      │ │         │   │                │   │     │      │    ┌──▼──────────┴──┐    │
> > >    │ │GPIO,GDSC│ └─▲──┬─┘ │         │   └────────────────┘   │     └──────┼────┤PCIE SCMI Inst  │    │
> > >    │ └─────────┘   │  │   │         │                        │            │    └──▲──────────┬──┘    │
> > >    │               │  │   │         │                        │            │       │          │       │
> > >    └───────────────┼──┼───┘         │                        │            └───────┼──────────┼───────┘
> > >                    │  │             │                        │                    │          │
> > >                    │  │             └────────────────────────┘                    │          │
> > >                    │  │                                                           │          │
> > >                    │  │                                                           │          │
> > >                    │  │                                                           │          │
> > >                    │  │                                                           │IRQ       │HVC
> > >                IRQ │  │HVC                                                        │          │
> > >                    │  │                                                           │          │
> > >                    │  │                                                           │          │
> > >                    │  │                                                           │          │
> > > ┌─────────────────┴──▼───────────────────────────────────────────────────────────┴──────────▼──────────────┐
> > > │                                                                                                          │
> > > │                                                                                                          │
> > > │                                      HYPERVISOR                                                          │
> > > │                                                                                                          │
> > > │                                                                                                          │
> > > │                                                                                                          │
> > > └──────────────────────────────────────────────────────────────────────────────────────────────────────────┘
> > >    ┌─────────────┐    ┌─────────────┐  ┌──────────┐   ┌───────────┐   ┌─────────────┐  ┌────────────┐
> > >    │             │    │             │  │          │   │           │   │  PCIE       │  │   PCIE     │
> > >    │   CLOCK     │    │   REGULATOR │  │   GPIO   │   │   GDSC    │   │  PHY        │  │ controller │
> > >    └─────────────┘    └─────────────┘  └──────────┘   └───────────┘   └─────────────┘  └────────────┘
> > 
> > Thanks a lot for working on this Mayank! This version looks good to me. I've
> > left some comments, nothing alarming though.
> Thanks for reviewing change. I would address those in next patchset.
> 
> > But I do want to hold up this series until we finalize the SCMI based design.
> ok. I want to send these changes which are prepared based on previously
> provided feedback, to see if we have any major concern here in terms of
> getting functionality.
> 

That's fine. My comment was a note to the maintainers.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

      reply	other threads:[~2024-11-19 17:10 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-06 22:13 [PATCH v3 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex Mayank Rana
2024-11-06 22:13 ` [PATCH v3 1/4] PCI: dwc: Export dwc MSI controller related APIs Mayank Rana
2024-11-15  9:14   ` Manivannan Sadhasivam
2024-11-15 18:15     ` Mayank Rana
2024-11-06 22:13 ` [PATCH v3 2/4] PCI: host-generic: Export gen_pci_init() API to allow ECAM creation Mayank Rana
2024-11-15  9:17   ` Manivannan Sadhasivam
2024-11-15 18:16     ` Mayank Rana
2024-11-06 22:13 ` [PATCH v3 3/4] dt-bindings: PCI: qcom,pcie-sa8255p: Document ECAM compliant PCIe root complex Mayank Rana
2024-11-07  9:35   ` Krzysztof Kozlowski
2024-11-07 17:39     ` Mayank Rana
2024-11-15 10:55   ` Manivannan Sadhasivam
2024-11-06 22:13 ` [PATCH v3 4/4] PCI: qcom: Add Qualcomm SA8255p based PCIe root complex functionality Mayank Rana
2024-11-07  8:45   ` neil.armstrong
2024-11-07 17:45     ` Mayank Rana
2024-11-08 10:22       ` neil.armstrong
2024-11-15 11:21         ` Manivannan Sadhasivam
2024-11-15 18:17           ` Mayank Rana
2024-11-09 23:45   ` kernel test robot
2024-11-15 11:25   ` Manivannan Sadhasivam
2024-11-15 18:28     ` Mayank Rana
2024-11-19 17:14       ` Manivannan Sadhasivam
2024-11-15 11:28 ` [PATCH v3 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex Manivannan Sadhasivam
2024-11-15 18:31   ` Mayank Rana
2024-11-19 17:10     ` Manivannan Sadhasivam [this message]

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