From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: cros-qcom-dts-watchers@chromium.org,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
quic_vbadigan@quicinc.com, quic_vpernami@quicinc.com,
quic_mrana@quicinc.com, mmareddy@quicinc.com,
Krishna chaitanya chundru <quic_krichai@quicinc.com>,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Subject: [PATCH v3 3/4] PCI: dwc: Reduce DT reads by allocating host bridge via DWC glue driver
Date: Tue, 21 Jan 2025 14:32:21 +0530 [thread overview]
Message-ID: <20250121-enable_ecam-v3-3-cd84d3b2a7ba@oss.qualcomm.com> (raw)
In-Reply-To: <20250121-enable_ecam-v3-0-cd84d3b2a7ba@oss.qualcomm.com>
Allow DWC glue drivers to allocate the host bridge, avoiding redundant
device tree reads primarily in dw_pcie_ecam_supported().
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 3888f9fe5af1..0acf9db44f2c 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -484,8 +484,8 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
struct device *dev = pci->dev;
struct device_node *np = dev->of_node;
struct platform_device *pdev = to_platform_device(dev);
+ struct pci_host_bridge *bridge = pp->bridge;
struct resource_entry *win;
- struct pci_host_bridge *bridge;
struct resource *res;
int ret;
@@ -497,11 +497,12 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
return -ENODEV;
}
- bridge = devm_pci_alloc_host_bridge(dev, 0);
- if (!bridge)
- return -ENOMEM;
-
- pp->bridge = bridge;
+ if (!pp->bridge) {
+ bridge = devm_pci_alloc_host_bridge(dev, 0);
+ if (!bridge)
+ return -ENOMEM;
+ pp->bridge = bridge;
+ }
pp->cfg0_size = resource_size(res);
pp->cfg0_base = res->start;
--
2.34.1
next prev parent reply other threads:[~2025-01-21 9:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-21 9:02 [PATCH v3 0/4] PCI: dwc: Add ECAM support with iATU configuration Krishna Chaitanya Chundru
2025-01-21 9:02 ` [PATCH v3 1/4] arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature Krishna Chaitanya Chundru
2025-01-24 5:40 ` Manivannan Sadhasivam
2025-01-21 9:02 ` [PATCH v3 2/4] PCI: dwc: Add ECAM support with iATU configuration Krishna Chaitanya Chundru
2025-01-24 6:12 ` Manivannan Sadhasivam
2025-01-28 12:53 ` Konrad Dybcio
2025-01-21 9:02 ` Krishna Chaitanya Chundru [this message]
2025-01-24 6:18 ` [PATCH v3 3/4] PCI: dwc: Reduce DT reads by allocating host bridge via DWC glue driver Manivannan Sadhasivam
2025-01-24 8:26 ` Krishna Chaitanya Chundru
2025-01-24 9:36 ` Manivannan Sadhasivam
2025-01-21 9:02 ` [PATCH v3 4/4] PCI: qcom: Enable ECAM feature Krishna Chaitanya Chundru
2025-01-24 6:58 ` Manivannan Sadhasivam
2025-01-24 8:21 ` Krishna Chaitanya Chundru
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