From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, bwawrzyn@cisco.com, cassel@kernel.org,
wojciech.jasko-EXT@continental-corporation.com, a-verma1@ti.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
rockswang7@gmail.com
Subject: Re: [v3] PCI: cadence: Fix sending message with data or without data
Date: Fri, 14 Feb 2025 13:00:30 +0530 [thread overview]
Message-ID: <20250214073030.4vckeq2hf6wbb4ez@thinkpad> (raw)
In-Reply-To: <20250207103923.32190-1-18255117159@163.com>
On Fri, Feb 07, 2025 at 06:39:23PM +0800, Hans Zhang wrote:
> View from cdns document cdn_pcie_gen4_hpa_axi_ips_ug_v1.04.pdf.
> In section 9.1.7.1 AXI Subordinate to PCIe Address Translation
> Registers below:
>
> axi_s_awaddr bits 16 is 1 for MSG with data and 0 for MSG without data.
>
> Signed-off-by: hans.zhang <18255117159@163.com>
> ---
> Changes since v1-v2:
> - Change email number and Signed-off-by
> ---
> drivers/pci/controller/cadence/pcie-cadence-ep.c | 3 +--
> drivers/pci/controller/cadence/pcie-cadence.h | 2 +-
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c
> index e0cc4560dfde..0bf4cde34f51 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence-ep.c
> +++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c
> @@ -352,8 +352,7 @@ static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn, u8 intx,
> spin_unlock_irqrestore(&ep->lock, flags);
>
> offset = CDNS_PCIE_NORMAL_MSG_ROUTING(MSG_ROUTING_LOCAL) |
> - CDNS_PCIE_NORMAL_MSG_CODE(msg_code) |
> - CDNS_PCIE_MSG_NO_DATA;
> + CDNS_PCIE_NORMAL_MSG_CODE(msg_code);
> writel(0, ep->irq_cpu_addr + offset);
> }
>
> diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h
> index f5eeff834ec1..39ee9945c903 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence.h
> +++ b/drivers/pci/controller/cadence/pcie-cadence.h
> @@ -246,7 +246,7 @@ struct cdns_pcie_rp_ib_bar {
> #define CDNS_PCIE_NORMAL_MSG_CODE_MASK GENMASK(15, 8)
> #define CDNS_PCIE_NORMAL_MSG_CODE(code) \
> (((code) << 8) & CDNS_PCIE_NORMAL_MSG_CODE_MASK)
> -#define CDNS_PCIE_MSG_NO_DATA BIT(16)
> +#define CDNS_PCIE_MSG_DATA BIT(16)
Oops! So how did you spot the issue? Did INTx triggering ever worked? RC should
have reported it as malformed TLP isn't it?
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2025-02-14 7:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-07 10:39 [v3] PCI: cadence: Fix sending message with data or without data Hans Zhang
2025-02-14 7:30 ` Manivannan Sadhasivam [this message]
2025-02-14 8:23 ` Hans Zhang
2025-02-14 13:21 ` Manivannan Sadhasivam
2025-02-14 14:28 ` Hans Zhang
2025-02-14 15:31 ` Manivannan Sadhasivam
2025-02-14 15:48 ` Hans Zhang
2025-02-14 15:57 ` Manivannan Sadhasivam
2025-02-14 16:53 ` Hans Zhang
2025-02-14 16:06 ` Manivannan Sadhasivam
2025-02-14 16:49 ` Hans Zhang
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