[PATCH v1 0/2] pci_generic: Add supoprt for SA8775P target

[PATCH v1 0/2] pci_generic: Add supoprt for SA8775P target

[Mrinmay Sarkar]

This patch series add separate MHI host configuration to enable
only IP_SW channel for SA8775P target.

And also update the proper device id for SA8775P endpoint.

Mrinmay Sarkar (2):
  bus: mhi: host: pci_generic: Add supoprt for SA8775P target
  PCI: epf-mhi: Update device id for SA8775P

 drivers/bus/mhi/host/pci_generic.c           | 34 ++++++++++++++++++++
 drivers/pci/endpoint/functions/pci-epf-mhi.c |  2 +-
 2 files changed, 35 insertions(+), 1 deletion(-)

-- 
2.25.1

[PATCH v1 1/2] bus: mhi: host: pci_generic: Add supoprt for SA8775P target

[Mrinmay Sarkar]

Add generic info for SA8775P target. SA8775P supports IP_SW
usecase only. Hence use separate configuration to enable IP_SW
channel.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
---
 drivers/bus/mhi/host/pci_generic.c | 34 ++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 56ba4192c89c..b62a05e854e9 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -245,6 +245,19 @@ struct mhi_pci_dev_info {
 		.channel = ch_num,		\
 	}
 
+static const struct mhi_channel_config modem_qcom_v2_mhi_channels[] = {
+	MHI_CHANNEL_CONFIG_UL(46, "IP_SW0", 2048, 1),
+	MHI_CHANNEL_CONFIG_DL(47, "IP_SW0", 2048, 2),
+};
+
+static struct mhi_event_config modem_qcom_v2_mhi_events[] = {
+	/* first ring is control+data ring */
+	MHI_EVENT_CONFIG_CTRL(0, 64),
+	/* Software channels dedicated event ring */
+	MHI_EVENT_CONFIG_SW_DATA(1, 64),
+	MHI_EVENT_CONFIG_SW_DATA(2, 64),
+};
+
 static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = {
 	MHI_CHANNEL_CONFIG_UL(4, "DIAG", 16, 1),
 	MHI_CHANNEL_CONFIG_DL(5, "DIAG", 16, 1),
@@ -275,6 +288,15 @@ static struct mhi_event_config modem_qcom_v1_mhi_events[] = {
 	MHI_EVENT_CONFIG_HW_DATA(5, 2048, 101)
 };
 
+static const struct mhi_controller_config modem_qcom_v3_mhiv_config = {
+	.max_channels = 128,
+	.timeout_ms = 8000,
+	.num_channels = ARRAY_SIZE(modem_qcom_v2_mhi_channels),
+	.ch_cfg = modem_qcom_v2_mhi_channels,
+	.num_events = ARRAY_SIZE(modem_qcom_v2_mhi_events),
+	.event_cfg = modem_qcom_v2_mhi_events,
+};
+
 static const struct mhi_controller_config modem_qcom_v2_mhiv_config = {
 	.max_channels = 128,
 	.timeout_ms = 8000,
@@ -294,6 +316,16 @@ static const struct mhi_controller_config modem_qcom_v1_mhiv_config = {
 	.event_cfg = modem_qcom_v1_mhi_events,
 };
 
+static const struct mhi_pci_dev_info mhi_qcom_sa8775p_info = {
+	.name = "qcom-sa8775p",
+	.edl_trigger = false,
+	.config = &modem_qcom_v3_mhiv_config,
+	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+	.dma_data_width = 32,
+	.mru_default = 32768,
+	.sideband_wake = false,
+};
+
 static const struct mhi_pci_dev_info mhi_qcom_sdx75_info = {
 	.name = "qcom-sdx75m",
 	.fw = "qcom/sdx75m/xbl.elf",
@@ -720,6 +752,8 @@ static const struct mhi_pci_dev_info mhi_netprisma_fcun69_info = {
 
 /* Keep the list sorted based on the PID. New VID should be added as the last entry */
 static const struct pci_device_id mhi_pci_id_table[] = {
+	{PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0116),
+		.driver_data = (kernel_ulong_t) &mhi_qcom_sa8775p_info },
 	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
 		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
 	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, PCI_VENDOR_ID_QCOM, 0x010c),
-- 
2.25.1

[PATCH v1 2/2] PCI: epf-mhi: Update device id for SA8775P

[Mrinmay Sarkar]

Add change to assign proper device id for SA8775P EP.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
---
 drivers/pci/endpoint/functions/pci-epf-mhi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
index 54286a40bdfb..6643a88c7a0c 100644
--- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
+++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
@@ -125,7 +125,7 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
 
 static struct pci_epf_header sa8775p_header = {
 	.vendorid = PCI_VENDOR_ID_QCOM,
-	.deviceid = 0x0306,               /* FIXME: Update deviceid for sa8775p EP */
+	.deviceid = 0x0116,
 	.baseclass_code = PCI_CLASS_OTHERS,
 	.interrupt_pin = PCI_INTERRUPT_INTA,
 };
-- 
2.25.1

Re: [PATCH v1 0/2] pci_generic: Add supoprt for SA8775P target

[Krzysztof Wilczyński]

Hello,

> This patch series add separate MHI host configuration to enable
> only IP_SW channel for SA8775P target.
> 
> And also update the proper device id for SA8775P endpoint.

Applied to epf-mhi, thank you!

	Krzysztof

Re: [PATCH v1 0/2] pci_generic: Add supoprt for SA8775P target

[Bjorn Helgaas]

On Fri, Feb 21, 2025 at 03:05:22PM +0900, Krzysztof Wilczyński wrote:
> Hello,
> 
> > This patch series add separate MHI host configuration to enable
> > only IP_SW channel for SA8775P target.
> > 
> > And also update the proper device id for SA8775P endpoint.
> 
> Applied to epf-mhi, thank you!

I see "[2/2] PCI: epf-mhi: Update device id for SA8775P" on
pci/epf-mhi, but I don't see patch [1/2].  Where did that go?
They seem related, so I would think we'd want to merge them together.

Also, in [2/2], I guess the .deviceid change is known not to break
anything that's already in the field?

Bjorn

Re: [PATCH v1 0/2] pci_generic: Add supoprt for SA8775P target

[Krzysztof Wilczyński]

Hello,

> > > This patch series add separate MHI host configuration to enable
> > > only IP_SW channel for SA8775P target.
> > > 
> > > And also update the proper device id for SA8775P endpoint.
> > 
> > Applied to epf-mhi, thank you!
> 
> I see "[2/2] PCI: epf-mhi: Update device id for SA8775P" on
> pci/epf-mhi, but I don't see patch [1/2].  Where did that go?
> They seem related, so I would think we'd want to merge them together.

I asked Mani whether he would prefer for me to take the entire series via
the PCI tree, but he said that the first patch should go via the MHI tree.

So, I assume Mani will take it, then.  Mani, thoughts?

> Also, in [2/2], I guess the .deviceid change is known not to break
> anything that's already in the field?

Mrinmay, are you expecting any issues with this change?

Per the c670e29f5bfe ("PCI: epf-mhi: Add support for SA8775P SoC"):

  Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
  SA8775P is currently reusing the PID 0x0306 (the default one hardcoded
  in the config space header) as the unique PID is not yet allocated.

I think, we should be fine.  But would be best to confirm that.

	Krzysztof

Re: [PATCH v1 0/2] pci_generic: Add supoprt for SA8775P target

[Manivannan Sadhasivam]

On Sat, Feb 22, 2025 at 04:53:47PM +0900, Krzysztof Wilczyński wrote:
> Hello,
> 
> > > > This patch series add separate MHI host configuration to enable
> > > > only IP_SW channel for SA8775P target.
> > > > 
> > > > And also update the proper device id for SA8775P endpoint.
> > > 
> > > Applied to epf-mhi, thank you!
> > 
> > I see "[2/2] PCI: epf-mhi: Update device id for SA8775P" on
> > pci/epf-mhi, but I don't see patch [1/2].  Where did that go?
> > They seem related, so I would think we'd want to merge them together.
> 
> I asked Mani whether he would prefer for me to take the entire series via
> the PCI tree, but he said that the first patch should go via the MHI tree.
> 
> So, I assume Mani will take it, then.  Mani, thoughts?
> 

Yeah. Patch 1/2 should go via MHI tree as it is purely an MHI controller patch
(a.k.a host side patch). Whereas patch 2/2 is an endpoint side patch.

> > Also, in [2/2], I guess the .deviceid change is known not to break
> > anything that's already in the field?
> 
> Mrinmay, are you expecting any issues with this change?
> 
> Per the c670e29f5bfe ("PCI: epf-mhi: Add support for SA8775P SoC"):
> 
>   Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
>   SA8775P is currently reusing the PID 0x0306 (the default one hardcoded
>   in the config space header) as the unique PID is not yet allocated.
> 
> I think, we should be fine.  But would be best to confirm that.
> 

SA8775P with upstream endpoint is not used by anyone outside Qcom till now. So
changing the PID is safe.

- Mani

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Re: [PATCH v1 1/2] bus: mhi: host: pci_generic: Add supoprt for SA8775P target

[Manivannan Sadhasivam]

On Thu, Dec 05, 2024 at 12:24:19PM +0530, Mrinmay Sarkar wrote:
> Add generic info for SA8775P target. SA8775P supports IP_SW
> usecase only. Hence use separate configuration to enable IP_SW
> channel.
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

One comment below. But I'll fix it up while applying.

> ---
>  drivers/bus/mhi/host/pci_generic.c | 34 ++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
> index 56ba4192c89c..b62a05e854e9 100644
> --- a/drivers/bus/mhi/host/pci_generic.c
> +++ b/drivers/bus/mhi/host/pci_generic.c
> @@ -245,6 +245,19 @@ struct mhi_pci_dev_info {
>  		.channel = ch_num,		\
>  	}
>  
> +static const struct mhi_channel_config modem_qcom_v2_mhi_channels[] = {

I wouldn't call sa8775p as 'modem'.

- Mani

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Re: [PATCH v1 1/2] bus: mhi: host: pci_generic: Add supoprt for SA8775P target

[Manivannan Sadhasivam]

On Thu, Dec 05, 2024 at 12:24:19PM +0530, Mrinmay Sarkar wrote:
> Add generic info for SA8775P target. SA8775P supports IP_SW
> usecase only. Hence use separate configuration to enable IP_SW
> channel.
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>

Applied to mhi-next!

- Mani

> ---
>  drivers/bus/mhi/host/pci_generic.c | 34 ++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
> index 56ba4192c89c..b62a05e854e9 100644
> --- a/drivers/bus/mhi/host/pci_generic.c
> +++ b/drivers/bus/mhi/host/pci_generic.c
> @@ -245,6 +245,19 @@ struct mhi_pci_dev_info {
>  		.channel = ch_num,		\
>  	}
>  
> +static const struct mhi_channel_config modem_qcom_v2_mhi_channels[] = {
> +	MHI_CHANNEL_CONFIG_UL(46, "IP_SW0", 2048, 1),
> +	MHI_CHANNEL_CONFIG_DL(47, "IP_SW0", 2048, 2),
> +};
> +
> +static struct mhi_event_config modem_qcom_v2_mhi_events[] = {
> +	/* first ring is control+data ring */
> +	MHI_EVENT_CONFIG_CTRL(0, 64),
> +	/* Software channels dedicated event ring */
> +	MHI_EVENT_CONFIG_SW_DATA(1, 64),
> +	MHI_EVENT_CONFIG_SW_DATA(2, 64),
> +};
> +
>  static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = {
>  	MHI_CHANNEL_CONFIG_UL(4, "DIAG", 16, 1),
>  	MHI_CHANNEL_CONFIG_DL(5, "DIAG", 16, 1),
> @@ -275,6 +288,15 @@ static struct mhi_event_config modem_qcom_v1_mhi_events[] = {
>  	MHI_EVENT_CONFIG_HW_DATA(5, 2048, 101)
>  };
>  
> +static const struct mhi_controller_config modem_qcom_v3_mhiv_config = {
> +	.max_channels = 128,
> +	.timeout_ms = 8000,
> +	.num_channels = ARRAY_SIZE(modem_qcom_v2_mhi_channels),
> +	.ch_cfg = modem_qcom_v2_mhi_channels,
> +	.num_events = ARRAY_SIZE(modem_qcom_v2_mhi_events),
> +	.event_cfg = modem_qcom_v2_mhi_events,
> +};
> +
>  static const struct mhi_controller_config modem_qcom_v2_mhiv_config = {
>  	.max_channels = 128,
>  	.timeout_ms = 8000,
> @@ -294,6 +316,16 @@ static const struct mhi_controller_config modem_qcom_v1_mhiv_config = {
>  	.event_cfg = modem_qcom_v1_mhi_events,
>  };
>  
> +static const struct mhi_pci_dev_info mhi_qcom_sa8775p_info = {
> +	.name = "qcom-sa8775p",
> +	.edl_trigger = false,
> +	.config = &modem_qcom_v3_mhiv_config,
> +	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> +	.dma_data_width = 32,
> +	.mru_default = 32768,
> +	.sideband_wake = false,
> +};
> +
>  static const struct mhi_pci_dev_info mhi_qcom_sdx75_info = {
>  	.name = "qcom-sdx75m",
>  	.fw = "qcom/sdx75m/xbl.elf",
> @@ -720,6 +752,8 @@ static const struct mhi_pci_dev_info mhi_netprisma_fcun69_info = {
>  
>  /* Keep the list sorted based on the PID. New VID should be added as the last entry */
>  static const struct pci_device_id mhi_pci_id_table[] = {
> +	{PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0116),
> +		.driver_data = (kernel_ulong_t) &mhi_qcom_sa8775p_info },
>  	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
>  		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
>  	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, PCI_VENDOR_ID_QCOM, 0x010c),
> -- 
> 2.25.1
> 

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