Linux PCI subsystem development
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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: "Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	quic_mrana@quicinc.com, quic_vbadigan@quicinc.com,
	"Konrad Dybcio" <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v7 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties
Date: Thu, 6 Mar 2025 08:43:25 +0530	[thread overview]
Message-ID: <20250306031325.bmx3p6htwtb6l6ji@thinkpad> (raw)
In-Reply-To: <20250225-preset_v6-v7-1-a593f3ef3951@oss.qualcomm.com>

On Tue, Feb 25, 2025 at 05:15:04PM +0530, Krishna Chaitanya Chundru wrote:
> Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data
> rates used in lane equalization procedure.
> 
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

One minor nit below.

> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> This patch depends on the this dt binding pull request which got recently
> merged: https://github.com/devicetree-org/dt-schema/pull/146
> ---
> ---
>  arch/arm64/boot/dts/qcom/x1e80100.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 4936fa5b98ff..9a18b8f90145 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -3209,6 +3209,11 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
>  			phys = <&pcie3_phy>;
>  			phy-names = "pciephy";
>  
> +			eq-presets-8gts = /bits/ 16 <0x5555 0x5555 0x5555 0x5555
> +						     0x5555 0x5555 0x5555 0x5555>;
> +

Get rid of the newline between eq-presets-8gts and eq-presets-16gts.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2025-03-06  3:13 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-25 11:45 [PATCH v7 0/4] PCI: dwc: Add support for configuring lane equalization presets Krishna Chaitanya Chundru
2025-02-25 11:45 ` [PATCH v7 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties Krishna Chaitanya Chundru
2025-03-06  3:13   ` Manivannan Sadhasivam [this message]
2025-02-25 11:45 ` [PATCH v7 2/4] PCI: of: Add API to retrieve equalization presets from device tree Krishna Chaitanya Chundru
2025-02-26 22:12   ` Bjorn Helgaas
2025-03-06  3:22   ` Manivannan Sadhasivam
2025-03-11 11:01     ` Krishna Chaitanya Chundru
2025-03-14 15:00       ` Manivannan Sadhasivam
2025-02-25 11:45 ` [PATCH v7 3/4] PCI: dwc: Improve handling of PCIe lane configuration Krishna Chaitanya Chundru
2025-03-06  3:44   ` Manivannan Sadhasivam
2025-03-11 11:02     ` Krishna Chaitanya Chundru
2025-02-25 11:45 ` [PATCH v7 4/4] PCI: dwc: Add support for configuring lane equalization presets Krishna Chaitanya Chundru
2025-03-06  4:02   ` Manivannan Sadhasivam

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