Problem with kernel rescan and realloc BAR resource for endponts

Problem with kernel rescan and realloc BAR resource for endponts

[Maverickk 78]

Hello,

The command line parameter

pciehp.pciehp_force=1 pciehp.pciehp_debug=1 pcie_ports=native
pci=nocrs pci=hpmemsize=256M,realloc pci=noacpi pci=realloc=on
pci=nobios


There are a couple of endpoints connected to downstream ports on a
switch, and the endpoints are not visible during the BIOS (seabios)
enumeration, but they are brought out of reset just before kernel
starts pci scan.

Even though the kernel enumerates the endpoint with proper bdf and is
able to read the config space but its not able to properly program the
BAR register, the lspci lists as


Region 0: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
[size=32M]


This is an emulation platform.


Any inputs is appreciated


Raghu

Re: Problem with kernel rescan and realloc BAR resource for endponts

[Bjorn Helgaas]

On Thu, Apr 24, 2025 at 10:19:44PM +0530, Maverickk 78 wrote:
> Hello,
> 
> The command line parameter
> 
> pciehp.pciehp_force=1 pciehp.pciehp_debug=1 pcie_ports=native
> pci=nocrs pci=hpmemsize=256M,realloc pci=noacpi pci=realloc=on
> pci=nobios
> 
> 
> There are a couple of endpoints connected to downstream ports on a
> switch, and the endpoints are not visible during the BIOS (seabios)
> enumeration, but they are brought out of reset just before kernel
> starts pci scan.
> 
> Even though the kernel enumerates the endpoint with proper bdf and is
> able to read the config space but its not able to properly program the
> BAR register, the lspci lists as
> 
> 
> Region 0: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
> [size=32M]
> 
> 
> This is an emulation platform.

Can't really give any suggestions without seeing a complete dmesg log 
and output of "sudo lspci -vv".  This will give insight into how much
space the devices require and what space is available.

Bjorn

Re: Problem with kernel rescan and realloc BAR resource for endponts

[Maverickk 78]

Hi Bjorn,

Thanks for the quick response.

The DSP memory behind the bridge is 32M and the EP BAR0 requirement is 32M.

Looks like the issue is that the emulated EP was not honoring multiple
assignments.

Will reach out if I need more information.



On Thu, 24 Apr 2025 at 22:43, Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> On Thu, Apr 24, 2025 at 10:19:44PM +0530, Maverickk 78 wrote:
> > Hello,
> >
> > The command line parameter
> >
> > pciehp.pciehp_force=1 pciehp.pciehp_debug=1 pcie_ports=native
> > pci=nocrs pci=hpmemsize=256M,realloc pci=noacpi pci=realloc=on
> > pci=nobios
> >
> >
> > There are a couple of endpoints connected to downstream ports on a
> > switch, and the endpoints are not visible during the BIOS (seabios)
> > enumeration, but they are brought out of reset just before kernel
> > starts pci scan.
> >
> > Even though the kernel enumerates the endpoint with proper bdf and is
> > able to read the config space but its not able to properly program the
> > BAR register, the lspci lists as
> >
> >
> > Region 0: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
> > [size=32M]
> >
> >
> > This is an emulation platform.
>
> Can't really give any suggestions without seeing a complete dmesg log
> and output of "sudo lspci -vv".  This will give insight into how much
> space the devices require and what space is available.
>
> Bjorn