[pci:controller/dw-rockchip 2/3] drivers/pci/controller/dwc/pcie-dw-rockchip.c:227:9: error: 'PCIE_T_PVPERL_MS' undeclared; did you mean 'PCIE_ATU_TYPE_MSG'?

[kernel test robot <lkp@intel.com>]

Hi Niklas,

FYI, the error/warning was bisected to this commit, please ignore it if it's irrelevant.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git controller/dw-rockchip
head:   a47c73d6a884edf2a8b09015596744a495c6a236
commit: 56825f5946a0da29658fa8e768c8706dffdac82b [2/3] PCI: dw-rockchip: Replace PERST# sleep time with proper macro
config: arm-randconfig-003-20250531 (https://download.01.org/0day-ci/archive/20250531/202505310520.ElO2YbM3-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250531/202505310520.ElO2YbM3-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505310520.ElO2YbM3-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/pci/controller/dwc/pcie-dw-rockchip.c: In function 'rockchip_pcie_start_link':
>> drivers/pci/controller/dwc/pcie-dw-rockchip.c:227:9: error: 'PCIE_T_PVPERL_MS' undeclared (first use in this function); did you mean 'PCIE_ATU_TYPE_MSG'?
     msleep(PCIE_T_PVPERL_MS);
            ^~~~~~~~~~~~~~~~
            PCIE_ATU_TYPE_MSG
   drivers/pci/controller/dwc/pcie-dw-rockchip.c:227:9: note: each undeclared identifier is reported only once for each function it appears in


vim +227 drivers/pci/controller/dwc/pcie-dw-rockchip.c

   208	
   209	static int rockchip_pcie_start_link(struct dw_pcie *pci)
   210	{
   211		struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
   212	
   213		/* Reset device */
   214		gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
   215	
   216		rockchip_pcie_enable_ltssm(rockchip);
   217	
   218		/*
   219		 * PCIe requires the refclk to be stable for 100µs prior to releasing
   220		 * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI
   221		 * Express Card Electromechanical Specification, 1.1. However, we don't
   222		 * know if the refclk is coming from RC's PHY or external OSC. If it's
   223		 * from RC, so enabling LTSSM is the just right place to release #PERST.
   224		 * We need more extra time as before, rather than setting just
   225		 * 100us as we don't know how long should the device need to reset.
   226		 */
 > 227		msleep(PCIE_T_PVPERL_MS);
   228		gpiod_set_value_cansleep(rockchip->rst_gpio, 1);
   229	
   230		return 0;
   231	}
   232	

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