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From: Bjorn Helgaas <helgaas@kernel.org>
To: "Verma, Devendra" <Devendra.Verma@amd.com>
Cc: "bhelgaas@google.com" <bhelgaas@google.com>,
	"mani@kernel.org" <mani@kernel.org>,
	"vkoul@kernel.org" <vkoul@kernel.org>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Simek, Michal" <michal.simek@amd.com>
Subject: Re: [PATCH v2 1/2] dmaengine: dw-edma: Add AMD MDB Endpoint Support
Date: Wed, 17 Sep 2025 15:08:15 -0500	[thread overview]
Message-ID: <20250917200815.GA1872720@bhelgaas> (raw)
In-Reply-To: <SA1PR12MB8120DB05E469F3645F3C18A09517A@SA1PR12MB8120.namprd12.prod.outlook.com>

On Wed, Sep 17, 2025 at 11:59:09AM +0000, Verma, Devendra wrote:
> > -----Original Message-----
> > From: Bjorn Helgaas <helgaas@kernel.org>
> > Sent: Tuesday, September 16, 2025 20:34
> > To: Verma, Devendra <Devendra.Verma@amd.com>
> > Cc: bhelgaas@google.com; mani@kernel.org; vkoul@kernel.org;
> > dmaengine@vger.kernel.org; linux-pci@vger.kernel.org; linux-
> > kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>
> > Subject: Re: [PATCH v2 1/2] dmaengine: dw-edma: Add AMD MDB Endpoint
> > Support
> >
> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > On Tue, Sep 16, 2025 at 04:13:18PM +0530, Devendra K Verma wrote:
> > > AMD MDB PCIe endpoint support. For AMD specific support added the
> > > following
> > >   - AMD supported PCIe Device IDs and Vendor ID (Xilinx).
> > >   - AMD MDB specific driver data
> > >   - AMD MDB specific VSEC capability to retrieve the device DDR
> > >     base address.

> > > -     vsec = pci_find_vsec_capability(pdev, PCI_VENDOR_ID_SYNOPSYS,
> > > -                                     DW_PCIE_VSEC_DMA_ID);
> > > +     /*
> > > +      * Synopsys and AMD (Xilinx) use the same VSEC ID for the purpose
> > > +      * of map, channel counts, etc.
> > > +      */
> > > +     if (vendor != PCI_VENDOR_ID_SYNOPSYS ||
> > > +         vendor != PCI_VENDOR_ID_XILINX)
> > > +             return;
> > > +
> > > +     cap = DW_PCIE_VSEC_DMA_ID;
> > > +     if (vendor == PCI_VENDOR_ID_XILINX)
> > > +             cap = DW_PCIE_XILINX_MDB_VSEC_ID;
> > > +
> > > +     vsec = pci_find_vsec_capability(pdev, vendor, cap);
> >
> > This looks correct, so it's OK as-is.  But it does require more
> > analysis to verify than it would if you did it like this:
> >
> >   vsec = pci_find_vsec_capability(pdev, PCI_VENDOR_ID_SYNOPSYS,
> >                                   DW_PCIE_SYNOPSYS_VSEC_DMA_ID);
> >   if (!vsec) {
> >     vsec = pci_find_vsec_capability(pdev, PCI_VENDOR_ID_XILINX,
> >                                     DW_PCIE_XILINX_VSEC_DMA_ID);
> >     if (!vsec)
> >       return;
> >   }
> >
> > This way it's obvious from the pci_find_vsec_capability() calls
> > themselves (and could potentially be checked by coccinelle, etc)
> > that we're using the Vendor ID and VSEC ID correctly.
> 
> Instead of the above format, a clear assignment to vendor and cap
> would be good enough.  Reason for this is, if a third vendor comes
> and supports the same VSEC=0x6 id with similar capabilities then it
> looks bulky to put another clause as given above. Instead of this a
> cleaner approach would be to have a single
> pci_find_vsec_capability() and clear assignment to vendor and cap
> variables to make it look cleaner. Eg:

> switch (pdev->vendor) {
> case PCI_VENDOR_ID_XILINX:
>         vendor = pdev->vendor;
>         cap = DW_PCIE_XILINX_MDB_VSEC_DMA_ID;
> case PCI_VENDOR_ID_SYNOPSYS:
>         ...
> default:
>         return;
> }
> vsec = pci_find_vsec_capability(pdev, vendor, cap);

OK, that is less clumsy although not as mechanically checkable.

There's not much point in assigning "vendor = pdev->vendor".  You
could just do this:

  switch (pdev->vendor) {
  case PCI_VENDOR_ID_XILINX:
    cap = DW_PCIE_XILINX_MDB_VSEC_DMA_ID;
    break;
  case PCI_VENDOR_ID_SYNOPSYS:
    cap = DW_PCIE_SYNOPSYS_VSEC_DMA_ID;
    break;
  default:
    return;
  }

  pci_find_vsec_capability(pdev, pdev->vendor, cap);

  reply	other threads:[~2025-09-17 20:08 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-16 10:43 [PATCH v2 0/2] Add AMD MDB Endpoint and non-LL mode Support Devendra K Verma
2025-09-16 10:43 ` [PATCH v2 1/2] dmaengine: dw-edma: Add AMD MDB Endpoint Support Devendra K Verma
2025-09-16 10:55   ` [External] : " ALOK TIWARI
2025-09-16 15:05     ` Bjorn Helgaas
2025-09-17 12:01       ` Verma, Devendra
2025-09-16 15:04   ` Bjorn Helgaas
2025-09-17 11:59     ` Verma, Devendra
2025-09-17 20:08       ` Bjorn Helgaas [this message]
2025-09-16 10:43 ` [PATCH v2 2/2] dmaengine: dw-edma: Add non-LL mode Devendra K Verma

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