From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Benjamin Herrenschmidt" <benh@kernel.crashing.org>,
"Wei Yang" <weiyang@linux.vnet.ibm.com>,
"Malte Schröder" <malte+lkml@tnxip.de>
Cc: linux-kernel@vger.kernel.org,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 0/4] PCI: Bridge window head alignment fix/rework
Date: Fri, 28 Nov 2025 13:50:17 +0200 [thread overview]
Message-ID: <20251128115021.4287-1-ilpo.jarvinen@linux.intel.com> (raw)
First fix one alignment difference bug when handling realloc_head.
Rework bridge window head alignment calculation as the decades old
approach seems to leave gaps in between resources (please don't ask me
how the old approach works, I don't understand the logic behind it).
The old bridge window alignment approach was mostly okay with the gaps
because of gross over-estimation it applies to the tail alignment
(though I'm not entirely convinced there couldn't be corner cases where
things break due to those gaps).
With relaxed tail alignment, no tail alignment overestimation occurs so
gaps in between resources translate immediately to resource assignment
failures.
Apply the new head alignment first only to cases with the relaxed tail
alignment. Then, in a follow-up change, make the new alignment approach
the only one as it has higher regression risk and them being in
different commits allow bisect to differentiate which change is the
culprit in case of a problem.
I was first thinking of changing head alignment only for the relaxed
tail alignment cases. After extensive testing (admittedly, x86 centric)
indicated there are hardly any changes to the bridge window sizes at
all, I thought it might work out to just replace the old approach that
has clearly shown to be subject to resource gap problems with the new
one.
Ilpo Järvinen (4):
PCI: Fix bridge window alignment with optional resources
PCI: Rewrite bridge window head alignment function
PCI: Stop over-estimating bridge window size
resource: Increase MAX_IORES_LEVEL to 8
drivers/pci/setup-bus.c | 130 +++++++++++++---------------------------
kernel/resource.c | 2 +-
2 files changed, 41 insertions(+), 91 deletions(-)
base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787
--
2.39.5
next reply other threads:[~2025-11-28 11:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-28 11:50 Ilpo Järvinen [this message]
2025-11-28 11:50 ` [PATCH 1/4] PCI: Fix bridge window alignment with optional resources Ilpo Järvinen
2025-11-28 11:50 ` [PATCH 2/4] PCI: Rewrite bridge window head alignment function Ilpo Järvinen
2025-11-28 11:50 ` [PATCH 3/4] PCI: Stop over-estimating bridge window size Ilpo Järvinen
2025-11-28 11:50 ` [PATCH 4/4] resource: Increase MAX_IORES_LEVEL to 8 Ilpo Järvinen
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