From: Bjorn Helgaas <helgaas@kernel.org>
To: "Håkon Bugge" <haakon.bugge@oracle.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Johannes Thumshirn <morbidrsa@gmail.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org
Subject: Re: [PATCH v2 1/2] PCI: Initialize RCB from pci_configure_device
Date: Wed, 21 Jan 2026 16:40:10 -0600 [thread overview]
Message-ID: <20260121224010.GA1217051@bhelgaas> (raw)
In-Reply-To: <20260121113544.4163457-2-haakon.bugge@oracle.com>
On Wed, Jan 21, 2026 at 12:35:40PM +0100, Håkon Bugge wrote:
> Commit e42010d8207f ("PCI: Set Read Completion Boundary to 128 iff
> Root Port supports it (_HPX)") fixed a bogus _HPX type 2 record, which
> instructed program_hpx_type2() to set the RCB in an endpoint,
> although it's RC did not have the RCB bit set.
>
> e42010d8207f fixed that by qualifying the setting of the RCB in the
> endpoint with the RC supporting an 128 byte RCB.
>
> In retrospect, the program_hpx_type2() should only modify the AER
> bits, and stay away from fiddling with the Link Control Register.
>
> Hence, we explicitly program the RCB from pci_configure_device(). RCB
> is RO in Root Ports, and in VFs, the bit is RsvdP, so for these two
> cases we skip programming it. Then, if the Root Port has RCB set and
> it is not set in the EP, we set it.
>
> Fixes: Commit e42010d8207f ("PCI: Set Read Completion Boundary to 128 iff Root Port supports it (_HPX)")
> Signed-off-by: Håkon Bugge <haakon.bugge@oracle.com>
>
> ---
>
> Note, that the current duplication of pcie_root_rcb_set() will be
> removed in the next commit.
> ---
> drivers/pci/probe.c | 36 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 41183aed8f5d9..347af29868124 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -2410,6 +2410,41 @@ static void pci_configure_serr(struct pci_dev *dev)
> }
> }
>
> +static bool pcie_root_rcb_set(struct pci_dev *dev)
> +{
> + struct pci_dev *rp = pcie_find_root_port(dev);
> + u16 lnkctl;
> +
> + if (!rp)
> + return false;
> +
> + pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
> +
> + return !!(lnkctl & PCI_EXP_LNKCTL_RCB);
> +}
> +
> +static void pci_configure_rcb(struct pci_dev *dev)
> +{
> + /*
> + * Obviously, we need a Link Control register. The RCB is RO
> + * in Root Ports, so no need to attempt to set it for
> + * them. For VFs, the RCB is RsvdP, so, no need to set it.
> + * Then, if the Root Port has RCB set, then we set for the EP
> + * unless already set.
> + */
> + if (pcie_cap_has_lnkctl(dev) &&
> + (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
> + !dev->is_virtfn && pcie_root_rcb_set(dev)) {
> + u16 lnkctl;
> +
> + pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnkctl);
> + if (lnkctl & PCI_EXP_LNKCTL_RCB)
> + return;
> +
> + pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnkctl | PCI_EXP_LNKCTL_RCB);
> + }
RCB isn't meaningful for switches, so we'll read their LNKCTL
unnecessarily. I propose something like this, which also clears RCB
if it's set when it shouldn't be (I think this would indicate a
firmware defect):
/*
* Per PCIe r7.0, sec 7.5.3.7, RCB is only meaningful in Root Ports
* (where it is read-only), Endpoints, and Bridges. It may only be
* set for Endpoints and Bridges if it is set in the Root Port.
*/
if (!pci_is_pcie(dev) ||
pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM ||
pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
dev->is_virtfn)
return;
rcb = pcie_root_rcb_set(dev);
pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnkctl);
if (rcb) {
if (lnkctl & PCI_EXP_LNKCTL_RCB)
return;
lnkctl |= PCI_EXP_LNKCTL_RCB;
} else {
if (!(lnkctl & PCI_EXP_LNKCTL_RCB))
return;
pci_info(FW_INFO "clearing RCB (RCB not set in Root Port)\n");
lnkctl &= ~PCI_EXP_LNKCTL_RCB;
}
pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnkctl);
> +}
> +
> static void pci_configure_device(struct pci_dev *dev)
> {
> pci_configure_mps(dev);
> @@ -2419,6 +2454,7 @@ static void pci_configure_device(struct pci_dev *dev)
> pci_configure_aspm_l1ss(dev);
> pci_configure_eetlp_prefix(dev);
> pci_configure_serr(dev);
> + pci_configure_rcb(dev);
>
> pci_acpi_program_hp_params(dev);
> }
> --
> 2.43.5
>
next prev parent reply other threads:[~2026-01-21 22:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-21 11:35 [PATCH v2 0/2] PCI: Init RCB from pci_configure_device and fix program_hpx_type2 Håkon Bugge
2026-01-21 11:35 ` [PATCH v2 1/2] PCI: Initialize RCB from pci_configure_device Håkon Bugge
2026-01-21 17:41 ` Lukas Wunner
2026-01-21 19:13 ` Haakon Bugge
2026-01-21 22:40 ` Bjorn Helgaas [this message]
2026-01-22 9:42 ` Haakon Bugge
2026-01-22 10:22 ` Bjorn Helgaas
2026-01-22 10:36 ` Bjorn Helgaas
2026-01-22 10:49 ` Haakon Bugge
2026-01-22 11:04 ` Bjorn Helgaas
2026-01-22 11:12 ` Haakon Bugge
2026-01-22 11:35 ` Niklas Schnelle
2026-01-22 13:25 ` Haakon Bugge
2026-01-21 11:35 ` [PATCH v2 2/2] PCI/ACPI: Confine program_hpx_type2 to the AER bits Håkon Bugge
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