From: sashiko-bot@kernel.org
To: "Chengwen Feng" <fengchengwen@huawei.com>
Cc: linux-pci@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v12 4/6] PCI/TPH: Move tph_req_type initialization into pci_tph_init
Date: Tue, 26 May 2026 05:35:16 +0000 [thread overview]
Message-ID: <20260526053516.DAC291F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260526040830.52854-5-fengchengwen@huawei.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] The function pcie_tph_set_st_entry() lacks internal serialization, allowing concurrent modifications to the TPH Control Register and violating the PCIe specification.
- [High] Unprotected modifications to the pdev->tph_enabled bitfield can cause silent data corruption of adjacent pci_dev state flags.
--
commit c7677c01bf11b8624e4ab3ed133719b3aefd9b43
Author: Chengwen Feng <fengchengwen@huawei.com>
PCI/TPH: Move tph_req_type initialization into pci_tph_init
Relocate tph_req_type resolution logic from pcie_enable_tph() to
pci_tph_init(). The request type is fixed per device and root port topology
at probe time, no need recalculation on each TPH enable.
> diff --git a/drivers/pci/tph.c b/drivers/pci/tph.c
> index 95e2a95055eeb..3660ad5d36239 100644
> --- a/drivers/pci/tph.c
> +++ b/drivers/pci/tph.c
> @@ -371,7 +371,6 @@ void pcie_disable_tph(struct pci_dev *pdev)
> pci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, 0);
[Severity: High]
This isn't a bug introduced by this patch, but does pcie_tph_set_st_entry()
also need internal serialization when writing to the TPH Control Register?
pcie_tph_set_st_entry() temporarily disables TPH via set_ctrl_reg_req_en(),
updates the ST table, and then re-enables TPH.
Network drivers like bnxt call this function from irq_affinity_notify
callbacks, which execute in multi-threaded workqueues.
If multiple IRQ affinities are changed simultaneously, these callbacks can run
concurrently on different CPUs for the same pdev.
Without a lock protecting this sequence, could one thread re-enable TPH while
another thread is still actively updating its ST table entry?
This would violate PCIe r6.2, sec 6.17.3 (which requires TPH to be disabled
during ST updates) and cause overlapping read-modify-write operations on the
TPH Control Register, potentially leading to device instability.
>
> pdev->tph_mode = 0;
> - pdev->tph_req_type = 0;
> pdev->tph_enabled = 0;
[Severity: High]
This is a pre-existing issue, but can unprotected modifications to the
pdev->tph_enabled bitfield cause silent data corruption of adjacent pci_dev
state flags?
tph_enabled is defined as an unsigned int bitfield in struct pci_dev, sharing
a memory word with critical flags like block_cfg_access, is_busmaster, and
msi_enabled.
Bitfield assignments compile to non-atomic read-modify-write (RMW) operations
on the surrounding word.
pcie_enable_tph() and pcie_disable_tph() modify tph_enabled locklessly from
the PCI subsystem's perspective (e.g., bnxt calls it during device open under
rtnl_lock).
If another subsystem concurrently modifies an adjacent bitfield (e.g.,
pci_cfg_access_lock() updating block_cfg_access while holding pci_lock), will
the overlapping RMW cycles cause one of the updates to be silently lost,
corrupting the overall PCI device state?
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260526040830.52854-1-fengchengwen@huawei.com?part=4
next prev parent reply other threads:[~2026-05-26 5:35 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 4:08 [PATCH v12 0/6] vfio/pci: Add PCIe TPH support Chengwen Feng
2026-05-26 4:08 ` [PATCH v12 1/6] PCI/TPH: Fix pcie_tph_get_st_table_loc() field extraction Chengwen Feng
2026-05-26 4:31 ` sashiko-bot
2026-05-26 4:08 ` [PATCH v12 2/6] PCI/TPH: Export pcie_tph_get_st_modes() for external use Chengwen Feng
2026-05-26 4:51 ` sashiko-bot
2026-05-26 4:08 ` [PATCH v12 3/6] PCI/TPH: Add pcie_tph_enabled_mode() helper Chengwen Feng
2026-05-26 4:08 ` [PATCH v12 4/6] PCI/TPH: Move tph_req_type initialization into pci_tph_init Chengwen Feng
2026-05-26 5:35 ` sashiko-bot [this message]
2026-05-26 22:42 ` Alex Williamson
2026-05-26 4:08 ` [PATCH v12 5/6] vfio/pci: Add VFIO_DEVICE_FEATURE_TPH_ST for PCIe TPH steering tag management Chengwen Feng
2026-05-26 6:09 ` sashiko-bot
2026-05-26 22:42 ` Alex Williamson
2026-05-27 9:54 ` fengchengwen
2026-05-26 4:08 ` [PATCH v12 6/6] vfio/pci: Add PCIe TPH control register virtualization Chengwen Feng
2026-05-26 6:56 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260526053516.DAC291F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=fengchengwen@huawei.com \
--cc=kvm@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox