Re: [PATCH V4 4/7] arm64: dts: imx8mp-evk: Move power supply properties to Root Port node

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Critical] Removing power supply properties from the PCIe host controller node breaks backward compatibility with older kernels.
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commit d2930da890ce2314f11817b05c9728d18176f34c
Author: Sherry Sun <sherry.sun@nxp.com>

arm64: dts: imx8mp-evk: Move power supply properties to Root Port node

This commit moves the power supply properties from the PCIe controller
node to the Root Port child node to support the new PCI pwrctrl framework.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -772,8 +772,6 @@ &pcie0 {
>  	pinctrl-0 = <&pinctrl_pcie0>;
>  	/* This property is deprecated, use reset-gpios from the Root Port node. */
>  	reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
> -	vpcie-supply = <&reg_pcie0>;
> -	vpcie3v3aux-supply = <&reg_pcie0>;

[Severity: Critical]
Does removing these power supply properties from the host controller node
break backward compatibility with older kernels?

Older kernels (prior to the introduction of the new PCI pwrctrl framework)
rely on the pci-imx6.c host controller driver to parse the vpcie and
vpcie3v3aux regulators directly from the host controller node (&pcie0).

If these are removed, older kernels booting with this new device tree
will silently fail to enable these regulators because
devm_regulator_get_optional() safely ignores -ENODEV. As a result, the
PCIe slot will remain unpowered and endpoint enumeration will fail.

To maintain ABI stability, should these properties remain in the host
controller node as deprecated properties, just as the reset-gpio property
was retained above?

>  	supports-clkreq;
>  	status = "disabled";
>  };

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Sashiko AI review · https://sashiko.dev/#/patchset/20260630060710.3294811-1-sherry.sun@oss.nxp.com?part=4