[PATCH] pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge

[PATCH] pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge

[Derek J. Clark]

The MSI Claw A8 (MS-1T8K) hard-locks on resume from s2idle whenever an
SD/MMC card is present in the onboard Realtek RTS525A card reader
(10ec:525a), which sits behind root port 0000:00:02.2. The reader's
PCIe endpoint is fixed/soldered and not user-hotpluggable.

Firmware advertises this root port as PCIe hotplug-capable, and _OSC
grants the OS native hotplug control. When native hotplug is OS-owned,
resuming from s2idle races the port's hotplug/PME resume handling
against the RTS525A's own resume sequence when a card is present,
hard-locking the system.

Two kernel command line parameters were confirmed to prevent the hang:
pcie_aspm=off and pcie_ports=compat. Both stop the OS from running
its own hotplug/PME resume path against this port. The former does
so by dropping _OSC negotiation during boot, skipping the path that
enables PCIeHotPlug. The latter prevents the PME service resume
handling by aborting registration of the ports native services. Testing
different kernel boot commands, including pciehp=off and pcie_pme=off
did not resolve the issue. AER, DPC, SHPC, and LTR flags were not tested
because the hardware reports that the platform doesn't support those
features.

This quirk implements as narrow a fix as possible, clearing
native_pcie_hotplug on the host bridge, scoped by DMI board name
and this root port's bus/device/function, so the port driver never
registers a native hotplug service against it. As native_pcie_hotplug
is a struct pci_host_bridge field shared by every port under this root's
domain I also verified this to be the only slot under this root bridge
reporting HotPlug+.

SD card insertion is handled entirely by rtsx_pci's own card-detect logic,
so is unaffected by this quirk.

Signed-off-by: Derek J. Clark <derekjohn.clark@gmail.com>
---
 drivers/pci/quirks.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6501c949c5b7..8218f423fd2a 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -6420,3 +6420,29 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
 #endif
+
+/*
+ * The MSI Claw A8 firmware advertises native PCIe hotplug support for
+ * this root bridge, but native hotplug handling causes resume failures.
+ * Prevent the PCIe port driver from claiming native hotplug ownership.
+ */
+static void quirk_claw_a8_no_native_hotplug(struct pci_dev *pdev)
+{
+	struct pci_host_bridge *bridge;
+
+	if (!dmi_match(DMI_BOARD_NAME, "MS-1T8K"))
+		return;
+
+	if (pdev->bus->number != 0 ||
+	    PCI_SLOT(pdev->devfn) != 2 ||
+	    PCI_FUNC(pdev->devfn) != 2)
+		return;
+
+	bridge = pci_find_host_bridge(pdev->bus);
+	if (!bridge)
+		return;
+	dev_info(&pdev->dev, "disabling native PCIe hotplug\n");
+	bridge->native_pcie_hotplug = false;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x150b,
+			 quirk_claw_a8_no_native_hotplug);
-- 
2.55.0

Re: [PATCH] pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The quirk disables native PCIe hotplug on the shared host bridge rather than specifically for the target root port, which breaks hotplug functionality for dynamically enumerated Thunderbolt/USB4 devices system-wide.
--

--- Patch [1]: [PATCH] pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge ---
commit 841400e3b6d906dff0f94738835128127178d2e6
Author: Derek J. Clark <derekjohn.clark@gmail.com>

pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge

This commit adds a quirk for the MSI Claw A8 to prevent s2idle resume failures
caused by the Realtek card reader. It disables native PCIe hotplug on the host
bridge when the specific root port is found.

> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c

[ ... ]

> +static void quirk_claw_a8_no_native_hotplug(struct pci_dev *pdev)
> +{
> +	struct pci_host_bridge *bridge;
> +
> +	if (!dmi_match(DMI_BOARD_NAME, "MS-1T8K"))
> +		return;
> +
> +	if (pdev->bus->number != 0 ||
> +	    PCI_SLOT(pdev->devfn) != 2 ||
> +	    PCI_FUNC(pdev->devfn) != 2)
> +		return;
> +
> +	bridge = pci_find_host_bridge(pdev->bus);
> +	if (!bridge)
> +		return;
> +	dev_info(&pdev->dev, "disabling native PCIe hotplug\n");
> +	bridge->native_pcie_hotplug = false;

[Severity: High]
Does setting bridge->native_pcie_hotplug = false here break hotplug
functionality for dynamically enumerated Thunderbolt/USB4 devices on this
system?

Because the pci_host_bridge is a shared structure, modifying it globally
prevents the pciehp driver from claiming any hotplug-capable PCIe port under
that domain. While this might be the only fixed slot reporting HotPlug+ during
boot, downstream ports on dynamically hot-plugged PCIe switches (like
Thunderbolt docks, eGPUs, or NVMe enclosures) rely on the host bridge's native
hotplug capability to function.

Would it be safer to clear pdev->is_pciehp and pdev->is_hotplug_bridge on the
specific root port instead of modifying the shared host bridge?

> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x150b,
> +			 quirk_claw_a8_no_native_hotplug);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260806190439.12022-1-derekjohn.clark@gmail.com?part=1

Re: [PATCH] pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge

[Derek John Clark]

On Thu, Aug 6, 2026 at 12:19 PM <sashiko-bot@kernel.org> wrote:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] The quirk disables native PCIe hotplug on the shared host bridge rather than specifically for the target root port, which breaks hotplug functionality for dynamically enumerated Thunderbolt/USB4 devices system-wide.
> --
>
> --- Patch [1]: [PATCH] pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge ---
> commit 841400e3b6d906dff0f94738835128127178d2e6
> Author: Derek J. Clark <derekjohn.clark@gmail.com>
>
> pci: quirks: Disable native PCIe hotplug on MSI Claw A8 root bridge
>
> This commit adds a quirk for the MSI Claw A8 to prevent s2idle resume failures
> caused by the Realtek card reader. It disables native PCIe hotplug on the host
> bridge when the specific root port is found.
>
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
>
> [ ... ]
>
> > +static void quirk_claw_a8_no_native_hotplug(struct pci_dev *pdev)
> > +{
> > +     struct pci_host_bridge *bridge;
> > +
> > +     if (!dmi_match(DMI_BOARD_NAME, "MS-1T8K"))
> > +             return;
> > +
> > +     if (pdev->bus->number != 0 ||
> > +         PCI_SLOT(pdev->devfn) != 2 ||
> > +         PCI_FUNC(pdev->devfn) != 2)
> > +             return;
> > +
> > +     bridge = pci_find_host_bridge(pdev->bus);
> > +     if (!bridge)
> > +             return;
> > +     dev_info(&pdev->dev, "disabling native PCIe hotplug\n");
> > +     bridge->native_pcie_hotplug = false;
>
> [Severity: High]
> Does setting bridge->native_pcie_hotplug = false here break hotplug
> functionality for dynamically enumerated Thunderbolt/USB4 devices on this
> system?
>
> Because the pci_host_bridge is a shared structure, modifying it globally
> prevents the pciehp driver from claiming any hotplug-capable PCIe port under
> that domain. While this might be the only fixed slot reporting HotPlug+ during
> boot, downstream ports on dynamically hot-plugged PCIe switches (like
> Thunderbolt docks, eGPUs, or NVMe enclosures) rely on the host bridge's native
> hotplug capability to function.
>
> Would it be safer to clear pdev->is_pciehp and pdev->is_hotplug_bridge on the
> specific root port instead of modifying the shared host bridge?
>

Hi robot, and any humans reading this,

This identified something I missed when scoping the patch. The two USB
ports on top of the unit are USB4/TB capable and are affected by the
root bridge quirk. In a previous version of the patch I did try
pdev->is_hotplug_bridge = false to no effect, but was not aware of
pdev->is_pciehp. I will try with both and see if that resolves it at
the lower scope.

Thanks,
Derek

> > +}
> > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x150b,
> > +                      quirk_claw_a8_no_native_hotplug);
>
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20260806190439.12022-1-derekjohn.clark@gmail.com?part=1