From: sashiko-bot@kernel.org
To: "Gary Guo" <gary@garyguo.net>
Cc: "Alexandre Courbot" <acourbot@nvidia.com>,
ojeda@kernel.org, dri-devel@lists.freedesktop.org,
"Danilo Krummrich" <dakr@kernel.org>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 08/16] drm/tyr: specify base type for registers
Date: Wed, 19 Aug 2026 11:17:04 +0000 [thread overview]
Message-ID: <20260819111704.5513A1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260819-typed_register-v3-8-3699a75fadf1@garyguo.net>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Violation of vertical import style by adding a separate import statement instead of grouping with existing imports.
--
--- Patch [8]: [PATCH v3 08/16] drm/tyr: specify base type for registers ---
commit 34aca3035b4614556abef99eebb9d34305820b18
Author: Gary Guo <gary@garyguo.net>
drm/tyr: specify base type for registers
This commit specifies the base parameter for the register definitions in the
drm/tyr driver. It introduces and utilizes TyrRegisters to standardize the
base type across the register! macro invocations.
> diff --git a/drivers/gpu/drm/tyr/regs.rs b/drivers/gpu/drm/tyr/regs.rs
> index a62724378ced2..0c419c4e1186c 100644
> --- a/drivers/gpu/drm/tyr/regs.rs
> +++ b/drivers/gpu/drm/tyr/regs.rs
> @@ -57,7 +57,11 @@ pub(crate) mod gpu_control {
> uapi, //
> };
>
> + use crate::driver::TyrRegisters;
[Severity: Low]
This isn't a bug, but should this import be grouped with the existing
crate::driver imports above to follow the kernel's vertical import style
guidelines?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260819-typed_register-v3-0-3699a75fadf1@garyguo.net?part=8
next prev parent reply other threads:[~2026-08-19 11:17 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-19 11:09 [PATCH v3 00/16] rust: io: support register projections and remove relative registers Gary Guo
2026-08-19 11:09 ` [PATCH v3 01/16] rust: io: register: reimplement as proc macro Gary Guo
2026-08-19 11:17 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 02/16] rust: mem: add `transmute` with deferred size check Gary Guo
2026-08-19 11:16 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 03/16] rust: mem: add `AsRepr` and `AsReprMut` Gary Guo
2026-08-19 11:19 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 04/16] rust: io: perform conversions using `AsRepr` Gary Guo
2026-08-19 11:19 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 05/16] rust: io: support register projections Gary Guo
2026-08-19 11:16 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 06/16] rust: io: register: allow explicit base type specification Gary Guo
2026-08-19 11:22 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 07/16] gpu: nova-core: specify base type for registers Gary Guo
2026-08-19 11:19 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 08/16] drm/tyr: " Gary Guo
2026-08-19 11:17 ` sashiko-bot [this message]
2026-08-19 11:09 ` [PATCH v3 09/16] samples: rust: pci: " Gary Guo
2026-08-19 11:14 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 10/16] rust: io: register: make register have a typed base Gary Guo
2026-08-19 11:18 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 11/16] rust: io: register: support fixed offset register without bitfield Gary Guo
2026-08-19 11:17 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 12/16] gpu: nova-core: use projection for PFALCON and PFALCON2 registers Gary Guo
2026-08-19 11:17 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 13/16] gpu: nova-core: convert hshub0 from relative register to projection Gary Guo
2026-08-19 11:23 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 14/16] rust: io: register: remove relative registers Gary Guo
2026-08-19 11:23 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 15/16] rust: io: register: remove `Register` trait and cleanup macro Gary Guo
2026-08-19 11:21 ` sashiko-bot
2026-08-19 11:09 ` [PATCH v3 16/16] rust: io: register: unify handling of register with/without bitfields Gary Guo
2026-08-19 11:26 ` sashiko-bot
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